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Side by Side Diff: src/mips64/assembler-mips64.h

Issue 2069933003: Implement byte swapping instructions on MIPS32 and MIPS64. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix tests Created 4 years, 5 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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900 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size); 900 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size);
901 void dext_(Register rt, Register rs, uint16_t pos, uint16_t size); 901 void dext_(Register rt, Register rs, uint16_t pos, uint16_t size);
902 void dextm(Register rt, Register rs, uint16_t pos, uint16_t size); 902 void dextm(Register rt, Register rs, uint16_t pos, uint16_t size);
903 void dextu(Register rt, Register rs, uint16_t pos, uint16_t size); 903 void dextu(Register rt, Register rs, uint16_t pos, uint16_t size);
904 void dins_(Register rt, Register rs, uint16_t pos, uint16_t size); 904 void dins_(Register rt, Register rs, uint16_t pos, uint16_t size);
905 void bitswap(Register rd, Register rt); 905 void bitswap(Register rd, Register rt);
906 void dbitswap(Register rd, Register rt); 906 void dbitswap(Register rd, Register rt);
907 void align(Register rd, Register rs, Register rt, uint8_t bp); 907 void align(Register rd, Register rs, Register rt, uint8_t bp);
908 void dalign(Register rd, Register rs, Register rt, uint8_t bp); 908 void dalign(Register rd, Register rs, Register rt, uint8_t bp);
909 909
910 void wsbh(Register rd, Register rt);
911 void dsbh(Register rd, Register rt);
912 void dshd(Register rd, Register rt);
913 void seh(Register rd, Register rt);
914 void seb(Register rd, Register rt);
915
910 // --------Coprocessor-instructions---------------- 916 // --------Coprocessor-instructions----------------
911 917
912 // Load, store, and move. 918 // Load, store, and move.
913 void lwc1(FPURegister fd, const MemOperand& src); 919 void lwc1(FPURegister fd, const MemOperand& src);
914 void ldc1(FPURegister fd, const MemOperand& src); 920 void ldc1(FPURegister fd, const MemOperand& src);
915 921
916 void swc1(FPURegister fs, const MemOperand& dst); 922 void swc1(FPURegister fs, const MemOperand& dst);
917 void sdc1(FPURegister fs, const MemOperand& dst); 923 void sdc1(FPURegister fs, const MemOperand& dst);
918 924
919 void mtc1(Register rt, FPURegister fs); 925 void mtc1(Register rt, FPURegister fs);
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1519 public: 1525 public:
1520 explicit EnsureSpace(Assembler* assembler) { 1526 explicit EnsureSpace(Assembler* assembler) {
1521 assembler->CheckBuffer(); 1527 assembler->CheckBuffer();
1522 } 1528 }
1523 }; 1529 };
1524 1530
1525 } // namespace internal 1531 } // namespace internal
1526 } // namespace v8 1532 } // namespace v8
1527 1533
1528 #endif // V8_ARM_ASSEMBLER_MIPS_H_ 1534 #endif // V8_ARM_ASSEMBLER_MIPS_H_
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