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Side by Side Diff: src/mips/assembler-mips.h

Issue 2069933003: Implement byte swapping instructions on MIPS32 and MIPS64. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix tests Created 4 years, 5 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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843 void movf_d(FPURegister fd, FPURegister fs, uint16_t cc = 0); 843 void movf_d(FPURegister fd, FPURegister fs, uint16_t cc = 0);
844 void movn_s(FPURegister fd, FPURegister fs, Register rt); 844 void movn_s(FPURegister fd, FPURegister fs, Register rt);
845 void movn_d(FPURegister fd, FPURegister fs, Register rt); 845 void movn_d(FPURegister fd, FPURegister fs, Register rt);
846 // Bit twiddling. 846 // Bit twiddling.
847 void clz(Register rd, Register rs); 847 void clz(Register rd, Register rs);
848 void ins_(Register rt, Register rs, uint16_t pos, uint16_t size); 848 void ins_(Register rt, Register rs, uint16_t pos, uint16_t size);
849 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size); 849 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size);
850 void bitswap(Register rd, Register rt); 850 void bitswap(Register rd, Register rt);
851 void align(Register rd, Register rs, Register rt, uint8_t bp); 851 void align(Register rd, Register rs, Register rt, uint8_t bp);
852 852
853 void wsbh(Register rd, Register rt);
854 void seh(Register rd, Register rt);
855 void seb(Register rd, Register rt);
856
853 // --------Coprocessor-instructions---------------- 857 // --------Coprocessor-instructions----------------
854 858
855 // Load, store, and move. 859 // Load, store, and move.
856 void lwc1(FPURegister fd, const MemOperand& src); 860 void lwc1(FPURegister fd, const MemOperand& src);
857 void ldc1(FPURegister fd, const MemOperand& src); 861 void ldc1(FPURegister fd, const MemOperand& src);
858 862
859 void swc1(FPURegister fs, const MemOperand& dst); 863 void swc1(FPURegister fs, const MemOperand& dst);
860 void sdc1(FPURegister fs, const MemOperand& dst); 864 void sdc1(FPURegister fs, const MemOperand& dst);
861 865
862 void mtc1(Register rt, FPURegister fs); 866 void mtc1(Register rt, FPURegister fs);
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1469 public: 1473 public:
1470 explicit EnsureSpace(Assembler* assembler) { 1474 explicit EnsureSpace(Assembler* assembler) {
1471 assembler->CheckBuffer(); 1475 assembler->CheckBuffer();
1472 } 1476 }
1473 }; 1477 };
1474 1478
1475 } // namespace internal 1479 } // namespace internal
1476 } // namespace v8 1480 } // namespace v8
1477 1481
1478 #endif // V8_ARM_ASSEMBLER_MIPS_H_ 1482 #endif // V8_ARM_ASSEMBLER_MIPS_H_
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