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| 1 // Copyright (c) 2015, the Dartino project authors. Please see the AUTHORS file | 1 // Copyright (c) 2015, the Dartino project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE.md file. | 3 // BSD-style license that can be found in the LICENSE.md file. |
| 4 | 4 |
| 5 #ifndef SRC_VM_ASSEMBLER_ARM_H_ | 5 #ifndef SRC_VM_ASSEMBLER_ARM_H_ |
| 6 #define SRC_VM_ASSEMBLER_ARM_H_ | 6 #define SRC_VM_ASSEMBLER_ARM_H_ |
| 7 | 7 |
| 8 #ifndef SRC_VM_ASSEMBLER_H_ | 8 #ifndef SRC_VM_ASSEMBLER_H_ |
| 9 #error Do not include assembler_arm.h directly; use assembler.h instead. | 9 #error Do not include assembler_arm.h directly; use assembler.h instead. |
| 10 #endif | 10 #endif |
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| 158 | 158 |
| 159 #define INSTRUCTION_4(name, format, t0, t1, t2, t3) \ | 159 #define INSTRUCTION_4(name, format, t0, t1, t2, t3) \ |
| 160 void name(t0 a0, t1 a1, t2 a2, t3 a3) { \ | 160 void name(t0 a0, t1 a1, t2 a2, t3 a3) { \ |
| 161 Print(format, Wrap(a0), Wrap(a1), Wrap(a2), Wrap(a3)); \ | 161 Print(format, Wrap(a0), Wrap(a1), Wrap(a2), Wrap(a3)); \ |
| 162 } | 162 } |
| 163 | 163 |
| 164 class Assembler { | 164 class Assembler { |
| 165 public: | 165 public: |
| 166 INSTRUCTION_3(add, "add %r, %r, %r", Register, Register, Register); | 166 INSTRUCTION_3(add, "add %r, %r, %r", Register, Register, Register); |
| 167 INSTRUCTION_3(add, "add %r, %r, %i", Register, Register, const Immediate&); | 167 INSTRUCTION_3(add, "add %r, %r, %i", Register, Register, const Immediate&); |
| 168 INSTRUCTION_4(add, "add%c %r, %r, %i", Condition, Register, Register, |
| 169 const Immediate&); |
| 168 INSTRUCTION_3(add, "add %r, %r, %o", Register, Register, const Operand&); | 170 INSTRUCTION_3(add, "add %r, %r, %o", Register, Register, const Operand&); |
| 169 INSTRUCTION_3(adds, "adds %r, %r, %r", Register, Register, Register); | 171 INSTRUCTION_3(adds, "adds %r, %r, %r", Register, Register, Register); |
| 170 INSTRUCTION_3(adds, "adds %r, %r, %i", Register, Register, const Immediate&); | 172 INSTRUCTION_3(adds, "adds %r, %r, %i", Register, Register, const Immediate&); |
| 171 | 173 |
| 172 INSTRUCTION_3(and_, "and %r, %r, %i", Register, Register, const Immediate&); | 174 INSTRUCTION_3(and_, "and %r, %r, %i", Register, Register, const Immediate&); |
| 173 INSTRUCTION_3(and_, "and %r, %r, %r", Register, Register, Register); | 175 INSTRUCTION_3(and_, "and %r, %r, %r", Register, Register, Register); |
| 174 | 176 |
| 175 INSTRUCTION_3(asr, "asr %r, %r, %i", Register, Register, const Immediate&); | 177 INSTRUCTION_3(asr, "asr %r, %r, %i", Register, Register, const Immediate&); |
| 176 INSTRUCTION_3(asr, "asr %r, %r, %r", Register, Register, Register); | 178 INSTRUCTION_3(asr, "asr %r, %r, %r", Register, Register, Register); |
| 177 | 179 |
| 178 INSTRUCTION_1(b, "b %s", const char*); | 180 INSTRUCTION_1(b, "b %s", const char*); |
| 179 INSTRUCTION_2(b, "b%c %s", Condition, const char*); | 181 INSTRUCTION_2(b, "b%c %s", Condition, const char*); |
| 180 INSTRUCTION_1(b, "b %l", Label*); | 182 INSTRUCTION_1(b, "b %l", Label*); |
| 181 INSTRUCTION_2(b, "b%c %l", Condition, Label*); | 183 INSTRUCTION_2(b, "b%c %l", Condition, Label*); |
| 182 | 184 |
| 183 INSTRUCTION_3(bic, "bic %r, %r, %i", Register, Register, const Immediate&); | 185 INSTRUCTION_3(bic, "bic %r, %r, %i", Register, Register, const Immediate&); |
| 184 | 186 |
| 185 INSTRUCTION_0(bkpt, "bkpt"); | 187 INSTRUCTION_0(bkpt, "bkpt"); |
| 186 | 188 |
| 187 INSTRUCTION_1(bl, "bl %s", const char*); | 189 INSTRUCTION_1(bl, "bl %s", const char*); |
| 188 INSTRUCTION_1(blx, "blx %r", Register); | 190 INSTRUCTION_1(blx, "blx %r", Register); |
| 189 INSTRUCTION_1(bx, "bx %r", Register); | 191 INSTRUCTION_1(bx, "bx %r", Register); |
| 190 | 192 |
| 191 INSTRUCTION_2(cmp, "cmp %r, %r", Register, Register); | 193 INSTRUCTION_2(cmp, "cmp %r, %r", Register, Register); |
| 192 INSTRUCTION_2(cmp, "cmp %r, %i", Register, const Immediate&); | 194 INSTRUCTION_2(cmp, "cmp %r, %i", Register, const Immediate&); |
| 193 INSTRUCTION_2(cmp, "cmp %r, %o", Register, const Operand&); | 195 INSTRUCTION_2(cmp, "cmp %r, %o", Register, const Operand&); |
| 194 | 196 |
| 195 INSTRUCTION_3(eor, "eor %r, %r, %r", Register, Register, Register); | 197 INSTRUCTION_3(eor, "eor %r, %r, %r", Register, Register, Register); |
| 196 | 198 |
| 199 INSTRUCTION_1(it, "it %c", Condition); |
| 200 |
| 197 INSTRUCTION_2(ldr, "ldr %r, %a", Register, const Address&); | 201 INSTRUCTION_2(ldr, "ldr %r, %a", Register, const Address&); |
| 198 INSTRUCTION_2(ldr, "ldr %r, =%s", Register, const char*); | 202 INSTRUCTION_2(ldr, "ldr %r, =%s", Register, const char*); |
| 199 INSTRUCTION_2(ldr, "ldr %r, =%l", Register, Label*); | 203 INSTRUCTION_2(ldr, "ldr %r, =%l", Register, Label*); |
| 200 INSTRUCTION_3(ldr, "ldr %r, [%r], %i", Register, Register, const Immediate&); | 204 INSTRUCTION_3(ldr, "ldr %r, [%r], %i", Register, Register, const Immediate&); |
| 201 INSTRUCTION_2(ldrb, "ldrb %r, %a", Register, const Address&); | 205 INSTRUCTION_2(ldrb, "ldrb %r, %a", Register, const Address&); |
| 202 INSTRUCTION_3(ldrb, "ldrb %r, %a%W", Register, const Address&, WriteBack); | 206 INSTRUCTION_3(ldrb, "ldrb %r, %a%W", Register, const Address&, WriteBack); |
| 203 | 207 |
| 204 INSTRUCTION_3(lsl, "lsl %r, %r, %i", Register, Register, const Immediate&); | 208 INSTRUCTION_3(lsl, "lsl %r, %r, %i", Register, Register, const Immediate&); |
| 205 INSTRUCTION_3(lsl, "lsl %r, %r, %r", Register, Register, Register); | 209 INSTRUCTION_3(lsl, "lsl %r, %r, %r", Register, Register, Register); |
| 206 INSTRUCTION_3(lsr, "lsr %r, %r, %i", Register, Register, const Immediate&); | 210 INSTRUCTION_3(lsr, "lsr %r, %r, %i", Register, Register, const Immediate&); |
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| 280 const Operand* Wrap(const Operand& operand) { return &operand; } | 284 const Operand* Wrap(const Operand& operand) { return &operand; } |
| 281 }; | 285 }; |
| 282 | 286 |
| 283 #undef INSTRUCTION_0 | 287 #undef INSTRUCTION_0 |
| 284 #undef INSTRUCTION_1 | 288 #undef INSTRUCTION_1 |
| 285 #undef INSTRUCTION_2 | 289 #undef INSTRUCTION_2 |
| 286 | 290 |
| 287 } // namespace dartino | 291 } // namespace dartino |
| 288 | 292 |
| 289 #endif // SRC_VM_ASSEMBLER_ARM_H_ | 293 #endif // SRC_VM_ASSEMBLER_ARM_H_ |
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