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Side by Side Diff: src/compiler/mips/instruction-codes-mips.h

Issue 2066483008: MIPS: Followup '[turbofan] Introduce new operators Float32SubPreserveNan and Float64SubPreserveNan'. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Comment the iterpreter. Created 4 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 28 matching lines...) Expand all
39 V(MipsSarPair) \ 39 V(MipsSarPair) \
40 V(MipsExt) \ 40 V(MipsExt) \
41 V(MipsIns) \ 41 V(MipsIns) \
42 V(MipsRor) \ 42 V(MipsRor) \
43 V(MipsMov) \ 43 V(MipsMov) \
44 V(MipsTst) \ 44 V(MipsTst) \
45 V(MipsCmp) \ 45 V(MipsCmp) \
46 V(MipsCmpS) \ 46 V(MipsCmpS) \
47 V(MipsAddS) \ 47 V(MipsAddS) \
48 V(MipsSubS) \ 48 V(MipsSubS) \
49 V(MipsSubPreserveNanS) \
49 V(MipsMulS) \ 50 V(MipsMulS) \
50 V(MipsDivS) \ 51 V(MipsDivS) \
51 V(MipsModS) \ 52 V(MipsModS) \
52 V(MipsAbsS) \ 53 V(MipsAbsS) \
53 V(MipsSqrtS) \ 54 V(MipsSqrtS) \
54 V(MipsMaxS) \ 55 V(MipsMaxS) \
55 V(MipsMinS) \ 56 V(MipsMinS) \
56 V(MipsCmpD) \ 57 V(MipsCmpD) \
57 V(MipsAddD) \ 58 V(MipsAddD) \
58 V(MipsSubD) \ 59 V(MipsSubD) \
60 V(MipsSubPreserveNanD) \
59 V(MipsMulD) \ 61 V(MipsMulD) \
60 V(MipsDivD) \ 62 V(MipsDivD) \
61 V(MipsModD) \ 63 V(MipsModD) \
62 V(MipsAbsD) \ 64 V(MipsAbsD) \
63 V(MipsSqrtD) \ 65 V(MipsSqrtD) \
64 V(MipsMaxD) \ 66 V(MipsMaxD) \
65 V(MipsMinD) \ 67 V(MipsMinD) \
66 V(MipsAddPair) \ 68 V(MipsAddPair) \
67 V(MipsSubPair) \ 69 V(MipsSubPair) \
68 V(MipsMulPair) \ 70 V(MipsMulPair) \
(...skipping 63 matching lines...) Expand 10 before | Expand all | Expand 10 after
132 #define TARGET_ADDRESSING_MODE_LIST(V) \ 134 #define TARGET_ADDRESSING_MODE_LIST(V) \
133 V(MRI) /* [%r0 + K] */ \ 135 V(MRI) /* [%r0 + K] */ \
134 V(MRR) /* [%r0 + %r1] */ 136 V(MRR) /* [%r0 + %r1] */
135 137
136 138
137 } // namespace compiler 139 } // namespace compiler
138 } // namespace internal 140 } // namespace internal
139 } // namespace v8 141 } // namespace v8
140 142
141 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 143 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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