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Side by Side Diff: src/compiler/s390/instruction-codes-s390.h

Issue 2064783002: S390: [builtins] Introduce proper Float64Log1p, Float64Atan and Float64Atan2 operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 6 months ago
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1 // Copyright 2015 the V8 project authors. All rights reserved. 1 // Copyright 2015 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_ 5 #ifndef V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_
6 #define V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_ 6 #define V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 43 matching lines...) Expand 10 before | Expand all | Expand 10 after
54 V(S390_Div64) \ 54 V(S390_Div64) \
55 V(S390_DivU32) \ 55 V(S390_DivU32) \
56 V(S390_DivU64) \ 56 V(S390_DivU64) \
57 V(S390_DivFloat) \ 57 V(S390_DivFloat) \
58 V(S390_DivDouble) \ 58 V(S390_DivDouble) \
59 V(S390_Mod32) \ 59 V(S390_Mod32) \
60 V(S390_Mod64) \ 60 V(S390_Mod64) \
61 V(S390_ModU32) \ 61 V(S390_ModU32) \
62 V(S390_ModU64) \ 62 V(S390_ModU64) \
63 V(S390_ModDouble) \ 63 V(S390_ModDouble) \
64 V(S390_LogDouble) \
65 V(S390_Neg) \ 64 V(S390_Neg) \
66 V(S390_NegDouble) \ 65 V(S390_NegDouble) \
67 V(S390_SqrtFloat) \ 66 V(S390_SqrtFloat) \
68 V(S390_FloorFloat) \ 67 V(S390_FloorFloat) \
69 V(S390_CeilFloat) \ 68 V(S390_CeilFloat) \
70 V(S390_TruncateFloat) \ 69 V(S390_TruncateFloat) \
71 V(S390_AbsFloat) \ 70 V(S390_AbsFloat) \
72 V(S390_SqrtDouble) \ 71 V(S390_SqrtDouble) \
73 V(S390_FloorDouble) \ 72 V(S390_FloorDouble) \
74 V(S390_CeilDouble) \ 73 V(S390_CeilDouble) \
(...skipping 78 matching lines...) Expand 10 before | Expand all | Expand 10 after
153 // MRR = [register + register] 152 // MRR = [register + register]
154 #define TARGET_ADDRESSING_MODE_LIST(V) \ 153 #define TARGET_ADDRESSING_MODE_LIST(V) \
155 V(MRI) /* [%r0 + K] */ \ 154 V(MRI) /* [%r0 + K] */ \
156 V(MRR) /* [%r0 + %r1] */ 155 V(MRR) /* [%r0 + %r1] */
157 156
158 } // namespace compiler 157 } // namespace compiler
159 } // namespace internal 158 } // namespace internal
160 } // namespace v8 159 } // namespace v8
161 160
162 #endif // V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_ 161 #endif // V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_
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