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Side by Side Diff: src/compiler/mips64/code-generator-mips64.cc

Issue 2060743002: [builtins] Introduce proper Float64Log1p operator. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@Math_Log
Patch Set: REBASE Created 4 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
(...skipping 478 matching lines...) Expand 10 before | Expand all | Expand 10 after
489 __ sync(); \ 489 __ sync(); \
490 } while (0) 490 } while (0)
491 491
492 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr) \ 492 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr) \
493 do { \ 493 do { \
494 __ sync(); \ 494 __ sync(); \
495 __ asm_instr(i.InputRegister(2), i.MemoryOperand()); \ 495 __ asm_instr(i.InputRegister(2), i.MemoryOperand()); \
496 __ sync(); \ 496 __ sync(); \
497 } while (0) 497 } while (0)
498 498
499 #define ASSEMBLE_IEEE754_UNOP(name) \
500 do { \
501 FrameScope scope(masm(), StackFrame::MANUAL); \
502 __ PrepareCallCFunction(0, 1, kScratchReg); \
503 __ MovToFloatParameter(i.InputDoubleRegister(0)); \
504 __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \
505 0, 1); \
506 /* Move the result in the double result register. */ \
507 __ MovFromFloatResult(i.OutputDoubleRegister()); \
508 } while (0)
509
499 void CodeGenerator::AssembleDeconstructFrame() { 510 void CodeGenerator::AssembleDeconstructFrame() {
500 __ mov(sp, fp); 511 __ mov(sp, fp);
501 __ Pop(ra, fp); 512 __ Pop(ra, fp);
502 } 513 }
503 514
504 void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) { 515 void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) {
505 int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta); 516 int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta);
506 if (sp_slot_delta > 0) { 517 if (sp_slot_delta > 0) {
507 __ daddiu(sp, sp, sp_slot_delta * kPointerSize); 518 __ daddiu(sp, sp, sp_slot_delta * kPointerSize);
508 } 519 }
(...skipping 211 matching lines...) Expand 10 before | Expand all | Expand 10 after
720 __ bind(ool->exit()); 731 __ bind(ool->exit());
721 break; 732 break;
722 } 733 }
723 case kArchStackSlot: { 734 case kArchStackSlot: {
724 FrameOffset offset = 735 FrameOffset offset =
725 frame_access_state()->GetFrameOffset(i.InputInt32(0)); 736 frame_access_state()->GetFrameOffset(i.InputInt32(0));
726 __ Daddu(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp, 737 __ Daddu(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp,
727 Operand(offset.offset())); 738 Operand(offset.offset()));
728 break; 739 break;
729 } 740 }
730 case kIeee754Float64Log: { 741 case kIeee754Float64Log:
731 // TODO(bmeurer): We should really get rid of this special instruction, 742 ASSEMBLE_IEEE754_UNOP(log);
732 // and generate a CallAddress instruction instead.
733 FrameScope scope(masm(), StackFrame::MANUAL);
734 __ PrepareCallCFunction(0, 1, kScratchReg);
735 __ MovToFloatParameter(i.InputDoubleRegister(0));
736 __ CallCFunction(ExternalReference::ieee754_log_function(isolate()), 0,
737 1);
738 // Move the result in the double result register.
739 __ MovFromFloatResult(i.OutputDoubleRegister());
740 break; 743 break;
741 } 744 case kIeee754Float64Log1p:
745 ASSEMBLE_IEEE754_UNOP(log1p);
746 break;
742 case kMips64Add: 747 case kMips64Add:
743 __ Addu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 748 __ Addu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
744 break; 749 break;
745 case kMips64Dadd: 750 case kMips64Dadd:
746 __ Daddu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 751 __ Daddu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
747 break; 752 break;
748 case kMips64DaddOvf: 753 case kMips64DaddOvf:
749 // Pseudo-instruction used for overflow/branch. No opcode emitted here. 754 // Pseudo-instruction used for overflow/branch. No opcode emitted here.
750 break; 755 break;
751 case kMips64Sub: 756 case kMips64Sub:
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2267 padding_size -= v8::internal::Assembler::kInstrSize; 2272 padding_size -= v8::internal::Assembler::kInstrSize;
2268 } 2273 }
2269 } 2274 }
2270 } 2275 }
2271 2276
2272 #undef __ 2277 #undef __
2273 2278
2274 } // namespace compiler 2279 } // namespace compiler
2275 } // namespace internal 2280 } // namespace internal
2276 } // namespace v8 2281 } // namespace v8
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