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Side by Side Diff: src/compiler/mips/code-generator-mips.cc

Issue 2060743002: [builtins] Introduce proper Float64Log1p operator. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@Math_Log
Patch Set: REBASE Created 4 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
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478 __ sync(); \ 478 __ sync(); \
479 } while (0) 479 } while (0)
480 480
481 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr) \ 481 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr) \
482 do { \ 482 do { \
483 __ sync(); \ 483 __ sync(); \
484 __ asm_instr(i.InputRegister(2), i.MemoryOperand()); \ 484 __ asm_instr(i.InputRegister(2), i.MemoryOperand()); \
485 __ sync(); \ 485 __ sync(); \
486 } while (0) 486 } while (0)
487 487
488 #define ASSEMBLE_IEEE754_UNOP(name) \
489 do { \
490 FrameScope scope(masm(), StackFrame::MANUAL); \
491 __ PrepareCallCFunction(0, 1, kScratchReg); \
492 __ MovToFloatParameter(i.InputDoubleRegister(0)); \
493 __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \
494 0, 1); \
495 /* Move the result in the double result register. */ \
496 __ MovFromFloatResult(i.OutputDoubleRegister()); \
497 } while (0)
498
488 void CodeGenerator::AssembleDeconstructFrame() { 499 void CodeGenerator::AssembleDeconstructFrame() {
489 __ mov(sp, fp); 500 __ mov(sp, fp);
490 __ Pop(ra, fp); 501 __ Pop(ra, fp);
491 } 502 }
492 503
493 void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) { 504 void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) {
494 int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta); 505 int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta);
495 if (sp_slot_delta > 0) { 506 if (sp_slot_delta > 0) {
496 __ addiu(sp, sp, sp_slot_delta * kPointerSize); 507 __ addiu(sp, sp, sp_slot_delta * kPointerSize);
497 } 508 }
(...skipping 213 matching lines...) Expand 10 before | Expand all | Expand 10 after
711 __ bind(ool->exit()); 722 __ bind(ool->exit());
712 break; 723 break;
713 } 724 }
714 case kArchStackSlot: { 725 case kArchStackSlot: {
715 FrameOffset offset = 726 FrameOffset offset =
716 frame_access_state()->GetFrameOffset(i.InputInt32(0)); 727 frame_access_state()->GetFrameOffset(i.InputInt32(0));
717 __ Addu(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp, 728 __ Addu(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp,
718 Operand(offset.offset())); 729 Operand(offset.offset()));
719 break; 730 break;
720 } 731 }
721 case kIeee754Float64Log: { 732 case kIeee754Float64Log:
722 // TODO(bmeurer): We should really get rid of this special instruction, 733 ASSEMBLE_IEEE754_UNOP(log);
723 // and generate a CallAddress instruction instead.
724 FrameScope scope(masm(), StackFrame::MANUAL);
725 __ PrepareCallCFunction(0, 1, kScratchReg);
726 __ MovToFloatParameter(i.InputDoubleRegister(0));
727 __ CallCFunction(ExternalReference::ieee754_log_function(isolate()), 0,
728 1);
729 // Move the result in the double result register.
730 __ MovFromFloatResult(i.OutputDoubleRegister());
731 break; 734 break;
732 } 735 case kIeee754Float64Log1p:
736 ASSEMBLE_IEEE754_UNOP(log1p);
737 break;
733 case kMipsAdd: 738 case kMipsAdd:
734 __ Addu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 739 __ Addu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
735 break; 740 break;
736 case kMipsAddOvf: 741 case kMipsAddOvf:
737 // Pseudo-instruction used for overflow/branch. No opcode emitted here. 742 // Pseudo-instruction used for overflow/branch. No opcode emitted here.
738 break; 743 break;
739 case kMipsSub: 744 case kMipsSub:
740 __ Subu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 745 __ Subu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
741 break; 746 break;
742 case kMipsSubOvf: 747 case kMipsSubOvf:
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2009 padding_size -= v8::internal::Assembler::kInstrSize; 2014 padding_size -= v8::internal::Assembler::kInstrSize;
2010 } 2015 }
2011 } 2016 }
2012 } 2017 }
2013 2018
2014 #undef __ 2019 #undef __
2015 2020
2016 } // namespace compiler 2021 } // namespace compiler
2017 } // namespace internal 2022 } // namespace internal
2018 } // namespace v8 2023 } // namespace v8
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