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Issue 2060743002: [builtins] Introduce proper Float64Log1p operator. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@Math_Log
Patch Set: REBASE Created 4 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm/macro-assembler-arm.h" 7 #include "src/arm/macro-assembler-arm.h"
8 #include "src/ast/scopes.h" 8 #include "src/ast/scopes.h"
9 #include "src/compiler/code-generator-impl.h" 9 #include "src/compiler/code-generator-impl.h"
10 #include "src/compiler/gap-resolver.h" 10 #include "src/compiler/gap-resolver.h"
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400 } while (0) 400 } while (0)
401 401
402 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr) \ 402 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr) \
403 do { \ 403 do { \
404 __ dmb(ISH); \ 404 __ dmb(ISH); \
405 __ asm_instr(i.InputRegister(2), \ 405 __ asm_instr(i.InputRegister(2), \
406 MemOperand(i.InputRegister(0), i.InputRegister(1))); \ 406 MemOperand(i.InputRegister(0), i.InputRegister(1))); \
407 __ dmb(ISH); \ 407 __ dmb(ISH); \
408 } while (0) 408 } while (0)
409 409
410 #define ASSEMBLE_IEEE754_UNOP(name) \
411 do { \
412 /* TODO(bmeurer): We should really get rid of this special instruction, */ \
413 /* and generate a CallAddress instruction instead. */ \
414 FrameScope scope(masm(), StackFrame::MANUAL); \
415 __ PrepareCallCFunction(0, 1, kScratchReg); \
416 __ MovToFloatParameter(i.InputFloat64Register(0)); \
417 __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \
418 0, 1); \
419 /* Move the result in the double result register. */ \
420 __ MovFromFloatResult(i.OutputFloat64Register()); \
421 DCHECK_EQ(LeaveCC, i.OutputSBit()); \
422 } while (0)
423
410 void CodeGenerator::AssembleDeconstructFrame() { 424 void CodeGenerator::AssembleDeconstructFrame() {
411 __ LeaveFrame(StackFrame::MANUAL); 425 __ LeaveFrame(StackFrame::MANUAL);
412 } 426 }
413 427
414 void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) { 428 void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) {
415 int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta); 429 int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta);
416 if (sp_slot_delta > 0) { 430 if (sp_slot_delta > 0) {
417 __ add(sp, sp, Operand(sp_slot_delta * kPointerSize)); 431 __ add(sp, sp, Operand(sp_slot_delta * kPointerSize));
418 } 432 }
419 frame_access_state()->SetFrameAccessToDefault(); 433 frame_access_state()->SetFrameAccessToDefault();
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667 frame_access_state()->GetFrameOffset(i.InputInt32(0)); 681 frame_access_state()->GetFrameOffset(i.InputInt32(0));
668 Register base; 682 Register base;
669 if (offset.from_stack_pointer()) { 683 if (offset.from_stack_pointer()) {
670 base = sp; 684 base = sp;
671 } else { 685 } else {
672 base = fp; 686 base = fp;
673 } 687 }
674 __ add(i.OutputRegister(0), base, Operand(offset.offset())); 688 __ add(i.OutputRegister(0), base, Operand(offset.offset()));
675 break; 689 break;
676 } 690 }
677 case kIeee754Float64Log: { 691 case kIeee754Float64Log:
678 // TODO(bmeurer): We should really get rid of this special instruction, 692 ASSEMBLE_IEEE754_UNOP(log);
679 // and generate a CallAddress instruction instead.
680 FrameScope scope(masm(), StackFrame::MANUAL);
681 __ PrepareCallCFunction(0, 1, kScratchReg);
682 __ MovToFloatParameter(i.InputFloat64Register(0));
683 __ CallCFunction(ExternalReference::ieee754_log_function(isolate()), 0,
684 1);
685 // Move the result in the double result register.
686 __ MovFromFloatResult(i.OutputFloat64Register());
687 DCHECK_EQ(LeaveCC, i.OutputSBit());
688 break; 693 break;
689 } 694 case kIeee754Float64Log1p:
695 ASSEMBLE_IEEE754_UNOP(log1p);
696 break;
690 case kArmAdd: 697 case kArmAdd:
691 __ add(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1), 698 __ add(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1),
692 i.OutputSBit()); 699 i.OutputSBit());
693 break; 700 break;
694 case kArmAnd: 701 case kArmAnd:
695 __ and_(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1), 702 __ and_(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1),
696 i.OutputSBit()); 703 i.OutputSBit());
697 break; 704 break;
698 case kArmBic: 705 case kArmBic:
699 __ bic(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1), 706 __ bic(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1),
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1770 padding_size -= v8::internal::Assembler::kInstrSize; 1777 padding_size -= v8::internal::Assembler::kInstrSize;
1771 } 1778 }
1772 } 1779 }
1773 } 1780 }
1774 1781
1775 #undef __ 1782 #undef __
1776 1783
1777 } // namespace compiler 1784 } // namespace compiler
1778 } // namespace internal 1785 } // namespace internal
1779 } // namespace v8 1786 } // namespace v8
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