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Side by Side Diff: src/compiler/mips/instruction-selector-mips.cc

Issue 2060233002: [turbofan] Prevent storing signalling NaNs into holey double arrays. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix spelling, rebase Created 4 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
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1464 1464
1465 1465
1466 void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) { 1466 void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) {
1467 MipsOperandGenerator g(this); 1467 MipsOperandGenerator g(this);
1468 Node* left = node->InputAt(0); 1468 Node* left = node->InputAt(0);
1469 Node* right = node->InputAt(1); 1469 Node* right = node->InputAt(1);
1470 Emit(kMipsFloat64InsertHighWord32, g.DefineSameAsFirst(node), 1470 Emit(kMipsFloat64InsertHighWord32, g.DefineSameAsFirst(node),
1471 g.UseRegister(left), g.UseRegister(right)); 1471 g.UseRegister(left), g.UseRegister(right));
1472 } 1472 }
1473 1473
1474 void InstructionSelector::VisitFloat64SilenceNaN(Node* node) {
1475 MipsOperandGenerator g(this);
1476 Node* left = node->InputAt(0);
1477 InstructionOperand temps[] = {g.TempRegister()};
1478 Emit(kMipsFloat64SilenceNaN, g.DefineSameAsFirst(node), g.UseRegister(left),
1479 arraysize(temps), temps);
1480 }
1481
1474 void InstructionSelector::VisitAtomicLoad(Node* node) { 1482 void InstructionSelector::VisitAtomicLoad(Node* node) {
1475 LoadRepresentation load_rep = LoadRepresentationOf(node->op()); 1483 LoadRepresentation load_rep = LoadRepresentationOf(node->op());
1476 MipsOperandGenerator g(this); 1484 MipsOperandGenerator g(this);
1477 Node* base = node->InputAt(0); 1485 Node* base = node->InputAt(0);
1478 Node* index = node->InputAt(1); 1486 Node* index = node->InputAt(1);
1479 ArchOpcode opcode = kArchNop; 1487 ArchOpcode opcode = kArchNop;
1480 switch (load_rep.representation()) { 1488 switch (load_rep.representation()) {
1481 case MachineRepresentation::kWord8: 1489 case MachineRepresentation::kWord8:
1482 opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8; 1490 opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
1483 break; 1491 break;
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1575 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) || 1583 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) ||
1576 IsMipsArchVariant(kMips32r2)); 1584 IsMipsArchVariant(kMips32r2));
1577 return MachineOperatorBuilder::AlignmentRequirements:: 1585 return MachineOperatorBuilder::AlignmentRequirements::
1578 NoUnalignedAccessSupport(); 1586 NoUnalignedAccessSupport();
1579 } 1587 }
1580 } 1588 }
1581 1589
1582 } // namespace compiler 1590 } // namespace compiler
1583 } // namespace internal 1591 } // namespace internal
1584 } // namespace v8 1592 } // namespace v8
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