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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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99 V(MipsLw) \ | 99 V(MipsLw) \ |
100 V(MipsSw) \ | 100 V(MipsSw) \ |
101 V(MipsLwc1) \ | 101 V(MipsLwc1) \ |
102 V(MipsSwc1) \ | 102 V(MipsSwc1) \ |
103 V(MipsLdc1) \ | 103 V(MipsLdc1) \ |
104 V(MipsSdc1) \ | 104 V(MipsSdc1) \ |
105 V(MipsFloat64ExtractLowWord32) \ | 105 V(MipsFloat64ExtractLowWord32) \ |
106 V(MipsFloat64ExtractHighWord32) \ | 106 V(MipsFloat64ExtractHighWord32) \ |
107 V(MipsFloat64InsertLowWord32) \ | 107 V(MipsFloat64InsertLowWord32) \ |
108 V(MipsFloat64InsertHighWord32) \ | 108 V(MipsFloat64InsertHighWord32) \ |
| 109 V(MipsFloat64SilenceNaN) \ |
109 V(MipsFloat64Max) \ | 110 V(MipsFloat64Max) \ |
110 V(MipsFloat64Min) \ | 111 V(MipsFloat64Min) \ |
111 V(MipsFloat32Max) \ | 112 V(MipsFloat32Max) \ |
112 V(MipsFloat32Min) \ | 113 V(MipsFloat32Min) \ |
113 V(MipsPush) \ | 114 V(MipsPush) \ |
114 V(MipsStoreToStackSlot) \ | 115 V(MipsStoreToStackSlot) \ |
115 V(MipsStackClaim) | 116 V(MipsStackClaim) |
116 | 117 |
117 // Addressing modes represent the "shape" of inputs to an instruction. | 118 // Addressing modes represent the "shape" of inputs to an instruction. |
118 // Many instructions support multiple addressing modes. Addressing modes | 119 // Many instructions support multiple addressing modes. Addressing modes |
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131 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 132 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
132 V(MRI) /* [%r0 + K] */ \ | 133 V(MRI) /* [%r0 + K] */ \ |
133 V(MRR) /* [%r0 + %r1] */ | 134 V(MRR) /* [%r0 + %r1] */ |
134 | 135 |
135 | 136 |
136 } // namespace compiler | 137 } // namespace compiler |
137 } // namespace internal | 138 } // namespace internal |
138 } // namespace v8 | 139 } // namespace v8 |
139 | 140 |
140 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 141 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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