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Side by Side Diff: src/compiler/mips/instruction-selector-mips.cc

Issue 2060233002: [turbofan] Prevent storing signalling NaNs into holey double arrays. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Test Created 4 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
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1456 1456
1457 1457
1458 void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) { 1458 void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) {
1459 MipsOperandGenerator g(this); 1459 MipsOperandGenerator g(this);
1460 Node* left = node->InputAt(0); 1460 Node* left = node->InputAt(0);
1461 Node* right = node->InputAt(1); 1461 Node* right = node->InputAt(1);
1462 Emit(kMipsFloat64InsertHighWord32, g.DefineSameAsFirst(node), 1462 Emit(kMipsFloat64InsertHighWord32, g.DefineSameAsFirst(node),
1463 g.UseRegister(left), g.UseRegister(right)); 1463 g.UseRegister(left), g.UseRegister(right));
1464 } 1464 }
1465 1465
1466 void InstructionSelector::VisitFloat64SilenceNaN(Node* node) {
1467 MipsOperandGenerator g(this);
1468 Node* left = node->InputAt(0);
1469 InstructionOperand temps[] = {g.TempRegister()};
1470 Emit(kMipsFloat64SilenceNaN, g.DefineSameAsFirst(node), g.UseRegister(left),
1471 arraysize(temps), temps);
1472 }
1473
1466 void InstructionSelector::VisitAtomicLoad(Node* node) { 1474 void InstructionSelector::VisitAtomicLoad(Node* node) {
1467 LoadRepresentation load_rep = LoadRepresentationOf(node->op()); 1475 LoadRepresentation load_rep = LoadRepresentationOf(node->op());
1468 MipsOperandGenerator g(this); 1476 MipsOperandGenerator g(this);
1469 Node* base = node->InputAt(0); 1477 Node* base = node->InputAt(0);
1470 Node* index = node->InputAt(1); 1478 Node* index = node->InputAt(1);
1471 ArchOpcode opcode = kArchNop; 1479 ArchOpcode opcode = kArchNop;
1472 switch (load_rep.representation()) { 1480 switch (load_rep.representation()) {
1473 case MachineRepresentation::kWord8: 1481 case MachineRepresentation::kWord8:
1474 opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8; 1482 opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
1475 break; 1483 break;
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1567 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) || 1575 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) ||
1568 IsMipsArchVariant(kMips32r2)); 1576 IsMipsArchVariant(kMips32r2));
1569 return MachineOperatorBuilder::AlignmentRequirements:: 1577 return MachineOperatorBuilder::AlignmentRequirements::
1570 NoUnalignedAccessSupport(); 1578 NoUnalignedAccessSupport();
1571 } 1579 }
1572 } 1580 }
1573 1581
1574 } // namespace compiler 1582 } // namespace compiler
1575 } // namespace internal 1583 } // namespace internal
1576 } // namespace v8 1584 } // namespace v8
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