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| 1 ; RUIN: %llvm2ice %s | FileCheck %s |
| 2 ; RUIN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
| 3 ; RUN: %szdiff --llvm2ice=%llvm2ice %s | FileCheck --check-prefix=DUMP %s |
| 4 |
| 5 @i8v = common global i8 0, align 1 |
| 6 @i16v = common global i16 0, align 2 |
| 7 @i32v = common global i32 0, align 4 |
| 8 @i64v = common global i64 0, align 8 |
| 9 @u8v = common global i8 0, align 1 |
| 10 @u16v = common global i16 0, align 2 |
| 11 @u32v = common global i32 0, align 4 |
| 12 @u64v = common global i64 0, align 8 |
| 13 @i1 = common global i32 0, align 4 |
| 14 @i2 = common global i32 0, align 4 |
| 15 @u1 = common global i32 0, align 4 |
| 16 @u2 = common global i32 0, align 4 |
| 17 |
| 18 define void @from_int8() { |
| 19 entry: |
| 20 %v0 = load i8* @i8v, align 1 |
| 21 %v1 = sext i8 %v0 to i16 |
| 22 store i16 %v1, i16* @i16v, align 1 |
| 23 %v2 = sext i8 %v0 to i32 |
| 24 store i32 %v2, i32* @i32v, align 1 |
| 25 %v3 = sext i8 %v0 to i64 |
| 26 store i64 %v3, i64* @i64v, align 1 |
| 27 ret void |
| 28 ; CHECK: mov al, byte ptr [ |
| 29 ; CHECK-NEXT: movsx cx, al |
| 30 ; CHECK-NEXT: mov word ptr [ |
| 31 ; CHECK-NEXT: movsx ecx, al |
| 32 ; CHECK-NEXT: mov dword ptr [ |
| 33 ; CHECK-NEXT: movsx ecx, al |
| 34 ; CHECK-NEXT: sar eax, 31 |
| 35 ; CHECK-NEXT: mov dword ptr [i64v+4], |
| 36 ; CHECK-NEXT: mov dword ptr [i64v], |
| 37 } |
| 38 |
| 39 define void @from_int16() { |
| 40 entry: |
| 41 %v0 = load i16* @i16v, align 1 |
| 42 %v1 = trunc i16 %v0 to i8 |
| 43 store i8 %v1, i8* @i8v, align 1 |
| 44 %v2 = sext i16 %v0 to i32 |
| 45 store i32 %v2, i32* @i32v, align 1 |
| 46 %v3 = sext i16 %v0 to i64 |
| 47 store i64 %v3, i64* @i64v, align 1 |
| 48 ret void |
| 49 ; CHECK: mov ax, word ptr [ |
| 50 ; CHECK-NEXT: mov cx, ax |
| 51 ; CHECK-NEXT: mov byte ptr [ |
| 52 ; CHECK-NEXT: movsx ecx, ax |
| 53 ; CHECK-NEXT: mov dword ptr [ |
| 54 ; CHECK-NEXT: movsx ecx, ax |
| 55 ; CHECK-NEXT: sar eax, 31 |
| 56 ; CHECK-NEXT: mov dword ptr [i64v+4], |
| 57 ; CHECK-NEXT: mov dword ptr [i64v], |
| 58 } |
| 59 |
| 60 define void @from_int32() { |
| 61 entry: |
| 62 %v0 = load i32* @i32v, align 1 |
| 63 %v1 = trunc i32 %v0 to i8 |
| 64 store i8 %v1, i8* @i8v, align 1 |
| 65 %v2 = trunc i32 %v0 to i16 |
| 66 store i16 %v2, i16* @i16v, align 1 |
| 67 %v3 = sext i32 %v0 to i64 |
| 68 store i64 %v3, i64* @i64v, align 1 |
| 69 ret void |
| 70 ; CHECK: mov eax, dword ptr [ |
| 71 ; CHECK-NEXT: mov ecx, eax |
| 72 ; CHECK-NEXT: mov byte ptr [ |
| 73 ; CHECK-NEXT: mov ecx, eax |
| 74 ; CHECK-NEXT: mov word ptr [ |
| 75 ; CHECK-NEXT: mov ecx, eax |
| 76 ; CHECK-NEXT: sar eax, 31 |
| 77 ; CHECK-NEXT: mov dword ptr [i64v+4], |
| 78 ; CHECK-NEXT: mov dword ptr [i64v], |
| 79 } |
| 80 |
| 81 define void @from_int64() { |
| 82 entry: |
| 83 %v0 = load i64* @i64v, align 1 |
| 84 %v1 = trunc i64 %v0 to i8 |
| 85 store i8 %v1, i8* @i8v, align 1 |
| 86 %v2 = trunc i64 %v0 to i16 |
| 87 store i16 %v2, i16* @i16v, align 1 |
| 88 %v3 = trunc i64 %v0 to i32 |
| 89 store i32 %v3, i32* @i32v, align 1 |
| 90 ret void |
| 91 ; CHECK: mov eax, dword ptr [ |
| 92 ; CHECK-NEXT: mov ecx, eax |
| 93 ; CHECK-NEXT: mov byte ptr [ |
| 94 ; CHECK-NEXT: mov ecx, eax |
| 95 ; CHECK-NEXT: mov word ptr [ |
| 96 ; CHECK-NEXT: mov dword ptr [ |
| 97 } |
| 98 |
| 99 define void @from_uint8() { |
| 100 entry: |
| 101 %v0 = load i8* @u8v, align 1 |
| 102 %v1 = zext i8 %v0 to i16 |
| 103 store i16 %v1, i16* @i16v, align 1 |
| 104 %v2 = zext i8 %v0 to i32 |
| 105 store i32 %v2, i32* @i32v, align 1 |
| 106 %v3 = zext i8 %v0 to i64 |
| 107 store i64 %v3, i64* @i64v, align 1 |
| 108 ret void |
| 109 ; CHECK: mov al, byte ptr [ |
| 110 ; CHECK-NEXT: movzx cx, al |
| 111 ; CHECK-NEXT: mov word ptr [ |
| 112 ; CHECK-NEXT: movzx ecx, al |
| 113 ; CHECK-NEXT: mov dword ptr [ |
| 114 ; CHECK-NEXT: movzx eax, al |
| 115 ; CHECK-NEXT: mov ecx, 0 |
| 116 ; CHECK-NEXT: mov dword ptr [i64v+4], |
| 117 ; CHECK-NEXT: mov dword ptr [i64v], |
| 118 } |
| 119 |
| 120 define void @from_uint16() { |
| 121 entry: |
| 122 %v0 = load i16* @u16v, align 1 |
| 123 %v1 = trunc i16 %v0 to i8 |
| 124 store i8 %v1, i8* @i8v, align 1 |
| 125 %v2 = zext i16 %v0 to i32 |
| 126 store i32 %v2, i32* @i32v, align 1 |
| 127 %v3 = zext i16 %v0 to i64 |
| 128 store i64 %v3, i64* @i64v, align 1 |
| 129 ret void |
| 130 ; CHECK: mov ax, word ptr [ |
| 131 ; CHECK-NEXT: mov cx, ax |
| 132 ; CHECK-NEXT: mov byte ptr [ |
| 133 ; CHECK-NEXT: movzx ecx, ax |
| 134 ; CHECK-NEXT: mov dword ptr [ |
| 135 ; CHECK-NEXT: movzx eax, ax |
| 136 ; CHECK-NEXT: mov ecx, 0 |
| 137 ; CHECK-NEXT: mov dword ptr [i64v+4], |
| 138 ; CHECK-NEXT: mov dword ptr [i64v], |
| 139 } |
| 140 |
| 141 define void @from_uint32() { |
| 142 entry: |
| 143 %v0 = load i32* @u32v, align 1 |
| 144 %v1 = trunc i32 %v0 to i8 |
| 145 store i8 %v1, i8* @i8v, align 1 |
| 146 %v2 = trunc i32 %v0 to i16 |
| 147 store i16 %v2, i16* @i16v, align 1 |
| 148 %v3 = zext i32 %v0 to i64 |
| 149 store i64 %v3, i64* @i64v, align 1 |
| 150 ret void |
| 151 ; CHECK: mov eax, dword ptr [ |
| 152 ; CHECK-NEXT: mov ecx, eax |
| 153 ; CHECK-NEXT: mov byte ptr [ |
| 154 ; CHECK-NEXT: mov ecx, eax |
| 155 ; CHECK-NEXT: mov word ptr [ |
| 156 ; CHECK-NEXT: mov ecx, 0 |
| 157 ; CHECK-NEXT: mov dword ptr [i64v+4], |
| 158 ; CHECK-NEXT: mov dword ptr [i64v], |
| 159 } |
| 160 |
| 161 define void @from_uint64() { |
| 162 entry: |
| 163 %v0 = load i64* @u64v, align 1 |
| 164 %v1 = trunc i64 %v0 to i8 |
| 165 store i8 %v1, i8* @i8v, align 1 |
| 166 %v2 = trunc i64 %v0 to i16 |
| 167 store i16 %v2, i16* @i16v, align 1 |
| 168 %v3 = trunc i64 %v0 to i32 |
| 169 store i32 %v3, i32* @i32v, align 1 |
| 170 ret void |
| 171 ; CHECK: mov eax, dword ptr [ |
| 172 ; CHECK-NEXT: mov ecx, eax |
| 173 ; CHECK-NEXT: mov byte ptr [ |
| 174 ; CHECK-NEXT: mov ecx, eax |
| 175 ; CHECK-NEXT: mov word ptr [ |
| 176 ; CHECK-NEXT: mov dword ptr [ |
| 177 } |
| 178 |
| 179 ; ERRORS-NOT: ICE translation error |
| 180 ; DUMP-NOT: SZ |
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