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| 1 ; RUIN: %llvm2ice --verbose none %s | FileCheck %s |
| 2 ; RUIN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
| 3 ; RUN: %szdiff --llvm2ice=%llvm2ice %s | FileCheck --check-prefix=DUMP %s |
| 4 |
| 5 @__init_array_start = internal constant [0 x i8] zeroinitializer, align 4 |
| 6 @__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4 |
| 7 @__tls_template_start = internal constant [0 x i8] zeroinitializer, align 8 |
| 8 @__tls_template_alignment = internal constant [4 x i8] c"\01\00\00\00", align 4 |
| 9 |
| 10 define internal i32 @ignore64BitArg(i64 %a, i32 %b, i64 %c) { |
| 11 entry: |
| 12 ret i32 %b |
| 13 } |
| 14 |
| 15 define internal i32 @pass64BitArg(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f
) { |
| 16 entry: |
| 17 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 %b) |
| 18 %call1 = call i32 @ignore64BitArgNoInline(i64 %c, i32 123, i64 %d) |
| 19 %call2 = call i32 @ignore64BitArgNoInline(i64 %e, i32 123, i64 %f) |
| 20 %add = add i32 %call1, %call |
| 21 %add3 = add i32 %add, %call2 |
| 22 ret i32 %add3 |
| 23 } |
| 24 ; CHECK: pass64BitArg: |
| 25 ; CHECK: push 123 |
| 26 ; CHECK-NEXT: push |
| 27 ; CHECK-NEXT: push |
| 28 ; CHECK-NEXT: call ignore64BitArgNoInline |
| 29 ; CHECK: push |
| 30 ; CHECK-NEXT: push |
| 31 ; CHECK-NEXT: push 123 |
| 32 ; CHECK-NEXT: push |
| 33 ; CHECK-NEXT: push |
| 34 ; CHECK-NEXT: call ignore64BitArgNoInline |
| 35 ; CHECK: push |
| 36 ; CHECK-NEXT: push |
| 37 ; CHECK-NEXT: push 123 |
| 38 ; CHECK-NEXT: push |
| 39 ; CHECK-NEXT: push |
| 40 ; CHECK-NEXT: call ignore64BitArgNoInline |
| 41 |
| 42 declare i32 @ignore64BitArgNoInline(i64, i32, i64) |
| 43 |
| 44 define internal i32 @pass64BitConstArg(i64 %a, i64 %b) { |
| 45 entry: |
| 46 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 -240105309230672
5256) |
| 47 ret i32 %call |
| 48 } |
| 49 ; CHECK: pass64BitConstArg: |
| 50 ; CHECK: push 3735928559 |
| 51 ; CHECK-NEXT: push 305419896 |
| 52 ; CHECK-NEXT: push 123 |
| 53 ; CHECK-NEXT: push ecx |
| 54 ; CHECK-NEXT: push eax |
| 55 ; CHECK-NEXT: call ignore64BitArgNoInline |
| 56 |
| 57 define internal i64 @return64BitArg(i64 %a) { |
| 58 entry: |
| 59 ret i64 %a |
| 60 } |
| 61 ; CHECK: return64BitArg: |
| 62 ; CHECK: mov {{.*}}, dword ptr [esp+4] |
| 63 ; CHECK: mov {{.*}}, dword ptr [esp+8] |
| 64 ; CHECK: ret |
| 65 |
| 66 define internal i64 @return64BitConst() { |
| 67 entry: |
| 68 ret i64 -2401053092306725256 |
| 69 } |
| 70 ; CHECK: return64BitConst: |
| 71 ; CHECK: mov eax, 305419896 |
| 72 ; CHECK: mov edx, 3735928559 |
| 73 ; CHECK: ret |
| 74 |
| 75 define internal i64 @add64BitSigned(i64 %a, i64 %b) { |
| 76 entry: |
| 77 %add = add i64 %b, %a |
| 78 ret i64 %add |
| 79 } |
| 80 ; CHECK: add64BitSigned: |
| 81 ; CHECK: add |
| 82 ; CHECK: adc |
| 83 ; CHECK: ret |
| 84 |
| 85 define internal i64 @add64BitUnsigned(i64 %a, i64 %b) { |
| 86 entry: |
| 87 %add = add i64 %b, %a |
| 88 ret i64 %add |
| 89 } |
| 90 ; CHECK: add64BitUnsigned: |
| 91 ; CHECK: add |
| 92 ; CHECK: adc |
| 93 ; CHECK: ret |
| 94 |
| 95 define internal i64 @sub64BitSigned(i64 %a, i64 %b) { |
| 96 entry: |
| 97 %sub = sub i64 %a, %b |
| 98 ret i64 %sub |
| 99 } |
| 100 ; CHECK: sub64BitSigned: |
| 101 ; CHECK: sub |
| 102 ; CHECK: sbb |
| 103 ; CHECK: ret |
| 104 |
| 105 define internal i64 @sub64BitUnsigned(i64 %a, i64 %b) { |
| 106 entry: |
| 107 %sub = sub i64 %a, %b |
| 108 ret i64 %sub |
| 109 } |
| 110 ; CHECK: sub64BitUnsigned: |
| 111 ; CHECK: sub |
| 112 ; CHECK: sbb |
| 113 ; CHECK: ret |
| 114 |
| 115 define internal i64 @mul64BitSigned(i64 %a, i64 %b) { |
| 116 entry: |
| 117 %mul = mul i64 %b, %a |
| 118 ret i64 %mul |
| 119 } |
| 120 ; CHECK: mul64BitSigned: |
| 121 ; CHECK: imul |
| 122 ; CHECK: imul |
| 123 ; CHECK: mul |
| 124 ; CHECK: add |
| 125 ; CHECK: add |
| 126 ; CHECK: ret |
| 127 |
| 128 define internal i64 @mul64BitUnsigned(i64 %a, i64 %b) { |
| 129 entry: |
| 130 %mul = mul i64 %b, %a |
| 131 ret i64 %mul |
| 132 } |
| 133 ; CHECK: mul64BitUnsigned: |
| 134 ; CHECK: imul |
| 135 ; CHECK: imul |
| 136 ; CHECK: mul |
| 137 ; CHECK: add |
| 138 ; CHECK: add |
| 139 ; CHECK: ret |
| 140 |
| 141 define internal i64 @div64BitSigned(i64 %a, i64 %b) { |
| 142 entry: |
| 143 %div = sdiv i64 %a, %b |
| 144 ret i64 %div |
| 145 } |
| 146 ; CHECK: div64BitSigned: |
| 147 ; CHECK: call __divdi3 |
| 148 ; CHECK: ret |
| 149 |
| 150 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { |
| 151 entry: |
| 152 %div = udiv i64 %a, %b |
| 153 ret i64 %div |
| 154 } |
| 155 ; CHECK: div64BitUnsigned: |
| 156 ; CHECK: call __udivdi3 |
| 157 ; CHECK: ret |
| 158 |
| 159 define internal i64 @rem64BitSigned(i64 %a, i64 %b) { |
| 160 entry: |
| 161 %rem = srem i64 %a, %b |
| 162 ret i64 %rem |
| 163 } |
| 164 ; CHECK: rem64BitSigned: |
| 165 ; CHECK: call __moddi3 |
| 166 ; CHECK: ret |
| 167 |
| 168 define internal i64 @rem64BitUnsigned(i64 %a, i64 %b) { |
| 169 entry: |
| 170 %rem = urem i64 %a, %b |
| 171 ret i64 %rem |
| 172 } |
| 173 ; CHECK: rem64BitUnsigned: |
| 174 ; CHECK: call __umoddi3 |
| 175 ; CHECK: ret |
| 176 |
| 177 define internal i64 @shl64BitSigned(i64 %a, i64 %b) { |
| 178 entry: |
| 179 %shl = shl i64 %a, %b |
| 180 ret i64 %shl |
| 181 } |
| 182 ; CHECK: shl64BitSigned: |
| 183 ; CHECK: shld |
| 184 ; CHECK: shl e |
| 185 ; CHECK: test {{.*}}, 32 |
| 186 ; CHECK: je |
| 187 |
| 188 define internal i64 @shl64BitUnsigned(i64 %a, i64 %b) { |
| 189 entry: |
| 190 %shl = shl i64 %a, %b |
| 191 ret i64 %shl |
| 192 } |
| 193 ; CHECK: shl64BitUnsigned: |
| 194 ; CHECK: shld |
| 195 ; CHECK: shl e |
| 196 ; CHECK: test {{.*}}, 32 |
| 197 ; CHECK: je |
| 198 |
| 199 define internal i64 @shr64BitSigned(i64 %a, i64 %b) { |
| 200 entry: |
| 201 %shr = ashr i64 %a, %b |
| 202 ret i64 %shr |
| 203 } |
| 204 ; CHECK: shr64BitSigned: |
| 205 ; CHECK: shrd |
| 206 ; CHECK: sar |
| 207 ; CHECK: test {{.*}}, 32 |
| 208 ; CHECK: je |
| 209 ; CHECK: sar {{.*}}, 31 |
| 210 |
| 211 define internal i64 @shr64BitUnsigned(i64 %a, i64 %b) { |
| 212 entry: |
| 213 %shr = lshr i64 %a, %b |
| 214 ret i64 %shr |
| 215 } |
| 216 ; CHECK: shr64BitUnsigned: |
| 217 ; CHECK: shrd |
| 218 ; CHECK: shr |
| 219 ; CHECK: test {{.*}}, 32 |
| 220 ; CHECK: je |
| 221 |
| 222 define internal i64 @and64BitSigned(i64 %a, i64 %b) { |
| 223 entry: |
| 224 %and = and i64 %b, %a |
| 225 ret i64 %and |
| 226 } |
| 227 ; CHECK: and64BitSigned: |
| 228 ; CHECK: and |
| 229 ; CHECK: and |
| 230 |
| 231 define internal i64 @and64BitUnsigned(i64 %a, i64 %b) { |
| 232 entry: |
| 233 %and = and i64 %b, %a |
| 234 ret i64 %and |
| 235 } |
| 236 ; CHECK: and64BitUnsigned: |
| 237 ; CHECK: and |
| 238 ; CHECK: and |
| 239 |
| 240 define internal i64 @or64BitSigned(i64 %a, i64 %b) { |
| 241 entry: |
| 242 %or = or i64 %b, %a |
| 243 ret i64 %or |
| 244 } |
| 245 ; CHECK: or64BitSigned: |
| 246 ; CHECK: or |
| 247 ; CHECK: or |
| 248 |
| 249 define internal i64 @or64BitUnsigned(i64 %a, i64 %b) { |
| 250 entry: |
| 251 %or = or i64 %b, %a |
| 252 ret i64 %or |
| 253 } |
| 254 ; CHECK: or64BitUnsigned: |
| 255 ; CHECK: or |
| 256 ; CHECK: or |
| 257 |
| 258 define internal i64 @xor64BitSigned(i64 %a, i64 %b) { |
| 259 entry: |
| 260 %xor = xor i64 %b, %a |
| 261 ret i64 %xor |
| 262 } |
| 263 ; CHECK: xor64BitSigned: |
| 264 ; CHECK: xor |
| 265 ; CHECK: xor |
| 266 |
| 267 define internal i64 @xor64BitUnsigned(i64 %a, i64 %b) { |
| 268 entry: |
| 269 %xor = xor i64 %b, %a |
| 270 ret i64 %xor |
| 271 } |
| 272 ; CHECK: xor64BitUnsigned: |
| 273 ; CHECK: xor |
| 274 ; CHECK: xor |
| 275 |
| 276 define internal i32 @trunc64To32Signed(i64 %a) { |
| 277 entry: |
| 278 %conv = trunc i64 %a to i32 |
| 279 ret i32 %conv |
| 280 } |
| 281 ; CHECK: trunc64To32Signed: |
| 282 ; CHECK: mov eax, dword ptr [esp+4] |
| 283 ; CHECK-NEXT: ret |
| 284 |
| 285 define internal i32 @trunc64To16Signed(i64 %a) { |
| 286 entry: |
| 287 %conv = trunc i64 %a to i16 |
| 288 %conv.ret_ext = sext i16 %conv to i32 |
| 289 ret i32 %conv.ret_ext |
| 290 } |
| 291 ; CHECK: trunc64To16Signed: |
| 292 ; CHECK: mov eax, dword ptr [esp+4] |
| 293 ; CHECK-NEXT: movsx eax, ax |
| 294 ; CHECK-NEXT: ret |
| 295 |
| 296 define internal i32 @trunc64To8Signed(i64 %a) { |
| 297 entry: |
| 298 %conv = trunc i64 %a to i8 |
| 299 %conv.ret_ext = sext i8 %conv to i32 |
| 300 ret i32 %conv.ret_ext |
| 301 } |
| 302 ; CHECK: trunc64To8Signed: |
| 303 ; CHECK: mov eax, dword ptr [esp+4] |
| 304 ; CHECK-NEXT: movsx eax, al |
| 305 ; CHECK-NEXT: ret |
| 306 |
| 307 define internal i32 @trunc64To32Unsigned(i64 %a) { |
| 308 entry: |
| 309 %conv = trunc i64 %a to i32 |
| 310 ret i32 %conv |
| 311 } |
| 312 ; CHECK: trunc64To32Unsigned: |
| 313 ; CHECK: mov eax, dword ptr [esp+4] |
| 314 ; CHECK-NEXT: ret |
| 315 |
| 316 define internal i32 @trunc64To16Unsigned(i64 %a) { |
| 317 entry: |
| 318 %conv = trunc i64 %a to i16 |
| 319 %conv.ret_ext = zext i16 %conv to i32 |
| 320 ret i32 %conv.ret_ext |
| 321 } |
| 322 ; CHECK: trunc64To16Unsigned: |
| 323 ; CHECK: mov eax, dword ptr [esp+4] |
| 324 ; CHECK-NEXT: movzx eax, ax |
| 325 ; CHECK-NEXT: ret |
| 326 |
| 327 define internal i32 @trunc64To8Unsigned(i64 %a) { |
| 328 entry: |
| 329 %conv = trunc i64 %a to i8 |
| 330 %conv.ret_ext = zext i8 %conv to i32 |
| 331 ret i32 %conv.ret_ext |
| 332 } |
| 333 ; CHECK: trunc64To8Unsigned: |
| 334 ; CHECK: mov eax, dword ptr [esp+4] |
| 335 ; CHECK-NEXT: movzx eax, al |
| 336 ; CHECK-NEXT: ret |
| 337 |
| 338 define internal i32 @trunc64To1(i64 %a) { |
| 339 entry: |
| 340 ; %tobool = icmp ne i64 %a, 0 |
| 341 %tobool = trunc i64 %a to i1 |
| 342 %tobool.ret_ext = zext i1 %tobool to i32 |
| 343 ret i32 %tobool.ret_ext |
| 344 } |
| 345 ; CHECK: trunc64To1: |
| 346 ; CHECK: mov eax, dword ptr [esp+4] |
| 347 ; CHECK: and eax, 1 |
| 348 ; CHECK-NEXT: ret |
| 349 |
| 350 define internal i64 @sext32To64(i32 %a) { |
| 351 entry: |
| 352 %conv = sext i32 %a to i64 |
| 353 ret i64 %conv |
| 354 } |
| 355 ; CHECK: sext32To64: |
| 356 ; CHECK: mov |
| 357 ; CHECK: sar {{.*}}, 31 |
| 358 |
| 359 define internal i64 @sext16To64(i32 %a) { |
| 360 entry: |
| 361 %a.arg_trunc = trunc i32 %a to i16 |
| 362 %conv = sext i16 %a.arg_trunc to i64 |
| 363 ret i64 %conv |
| 364 } |
| 365 ; CHECK: sext16To64: |
| 366 ; CHECK: movsx |
| 367 ; CHECK: sar {{.*}}, 31 |
| 368 |
| 369 define internal i64 @sext8To64(i32 %a) { |
| 370 entry: |
| 371 %a.arg_trunc = trunc i32 %a to i8 |
| 372 %conv = sext i8 %a.arg_trunc to i64 |
| 373 ret i64 %conv |
| 374 } |
| 375 ; CHECK: sext8To64: |
| 376 ; CHECK: movsx |
| 377 ; CHECK: sar {{.*}}, 31 |
| 378 |
| 379 define internal i64 @zext32To64(i32 %a) { |
| 380 entry: |
| 381 %conv = zext i32 %a to i64 |
| 382 ret i64 %conv |
| 383 } |
| 384 ; CHECK: zext32To64: |
| 385 ; CHECK: mov |
| 386 ; CHECK: mov {{.*}}, 0 |
| 387 |
| 388 define internal i64 @zext16To64(i32 %a) { |
| 389 entry: |
| 390 %a.arg_trunc = trunc i32 %a to i16 |
| 391 %conv = zext i16 %a.arg_trunc to i64 |
| 392 ret i64 %conv |
| 393 } |
| 394 ; CHECK: zext16To64: |
| 395 ; CHECK: movzx |
| 396 ; CHECK: mov {{.*}}, 0 |
| 397 |
| 398 define internal i64 @zext8To64(i32 %a) { |
| 399 entry: |
| 400 %a.arg_trunc = trunc i32 %a to i8 |
| 401 %conv = zext i8 %a.arg_trunc to i64 |
| 402 ret i64 %conv |
| 403 } |
| 404 ; CHECK: zext8To64: |
| 405 ; CHECK: movzx |
| 406 ; CHECK: mov {{.*}}, 0 |
| 407 |
| 408 define internal i64 @zext1To64(i32 %a) { |
| 409 entry: |
| 410 %a.arg_trunc = trunc i32 %a to i1 |
| 411 %conv = zext i1 %a.arg_trunc to i64 |
| 412 ret i64 %conv |
| 413 } |
| 414 ; CHECK: zext1To64: |
| 415 ; CHECK: movzx |
| 416 ; CHECK: mov {{.*}}, 0 |
| 417 |
| 418 define internal void @icmpEq64(i64 %a, i64 %b, i64 %c, i64 %d) { |
| 419 entry: |
| 420 %cmp = icmp eq i64 %a, %b |
| 421 br i1 %cmp, label %if.then, label %if.end |
| 422 |
| 423 if.then: ; preds = %entry |
| 424 call void @func() |
| 425 br label %if.end |
| 426 |
| 427 if.end: ; preds = %if.then, %entry |
| 428 %cmp1 = icmp eq i64 %c, %d |
| 429 br i1 %cmp1, label %if.then2, label %if.end3 |
| 430 |
| 431 if.then2: ; preds = %if.end |
| 432 call void @func() |
| 433 br label %if.end3 |
| 434 |
| 435 if.end3: ; preds = %if.then2, %if.end |
| 436 ret void |
| 437 } |
| 438 ; CHECK: icmpEq64: |
| 439 ; CHECK: jne |
| 440 ; CHECK: jne |
| 441 ; CHECK: call |
| 442 ; CHECK: jne |
| 443 ; CHECK: jne |
| 444 ; CHECK: call |
| 445 |
| 446 declare void @func() |
| 447 |
| 448 define internal void @icmpNe64(i64 %a, i64 %b, i64 %c, i64 %d) { |
| 449 entry: |
| 450 %cmp = icmp ne i64 %a, %b |
| 451 br i1 %cmp, label %if.then, label %if.end |
| 452 |
| 453 if.then: ; preds = %entry |
| 454 call void @func() |
| 455 br label %if.end |
| 456 |
| 457 if.end: ; preds = %if.then, %entry |
| 458 %cmp1 = icmp ne i64 %c, %d |
| 459 br i1 %cmp1, label %if.then2, label %if.end3 |
| 460 |
| 461 if.then2: ; preds = %if.end |
| 462 call void @func() |
| 463 br label %if.end3 |
| 464 |
| 465 if.end3: ; preds = %if.end, %if.then2 |
| 466 ret void |
| 467 } |
| 468 ; CHECK: icmpNe64: |
| 469 ; CHECK: jne |
| 470 ; CHECK: jne |
| 471 ; CHECK: call |
| 472 ; CHECK: jne |
| 473 ; CHECK: jne |
| 474 ; CHECK: call |
| 475 |
| 476 define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) { |
| 477 entry: |
| 478 %cmp = icmp ugt i64 %a, %b |
| 479 br i1 %cmp, label %if.then, label %if.end |
| 480 |
| 481 if.then: ; preds = %entry |
| 482 call void @func() |
| 483 br label %if.end |
| 484 |
| 485 if.end: ; preds = %if.then, %entry |
| 486 %cmp1 = icmp sgt i64 %c, %d |
| 487 br i1 %cmp1, label %if.then2, label %if.end3 |
| 488 |
| 489 if.then2: ; preds = %if.end |
| 490 call void @func() |
| 491 br label %if.end3 |
| 492 |
| 493 if.end3: ; preds = %if.then2, %if.end |
| 494 ret void |
| 495 } |
| 496 ; CHECK: icmpGt64: |
| 497 ; CHECK: ja |
| 498 ; CHECK: jb |
| 499 ; CHECK: ja |
| 500 ; CHECK: call |
| 501 ; CHECK: jg |
| 502 ; CHECK: jl |
| 503 ; CHECK: ja |
| 504 ; CHECK: call |
| 505 |
| 506 define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) { |
| 507 entry: |
| 508 %cmp = icmp uge i64 %a, %b |
| 509 br i1 %cmp, label %if.then, label %if.end |
| 510 |
| 511 if.then: ; preds = %entry |
| 512 call void @func() |
| 513 br label %if.end |
| 514 |
| 515 if.end: ; preds = %if.then, %entry |
| 516 %cmp1 = icmp sge i64 %c, %d |
| 517 br i1 %cmp1, label %if.then2, label %if.end3 |
| 518 |
| 519 if.then2: ; preds = %if.end |
| 520 call void @func() |
| 521 br label %if.end3 |
| 522 |
| 523 if.end3: ; preds = %if.end, %if.then2 |
| 524 ret void |
| 525 } |
| 526 ; CHECK: icmpGe64: |
| 527 ; CHECK: ja |
| 528 ; CHECK: jb |
| 529 ; CHECK: jae |
| 530 ; CHECK: call |
| 531 ; CHECK: jg |
| 532 ; CHECK: jl |
| 533 ; CHECK: jae |
| 534 ; CHECK: call |
| 535 |
| 536 define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) { |
| 537 entry: |
| 538 %cmp = icmp ult i64 %a, %b |
| 539 br i1 %cmp, label %if.then, label %if.end |
| 540 |
| 541 if.then: ; preds = %entry |
| 542 call void @func() |
| 543 br label %if.end |
| 544 |
| 545 if.end: ; preds = %if.then, %entry |
| 546 %cmp1 = icmp slt i64 %c, %d |
| 547 br i1 %cmp1, label %if.then2, label %if.end3 |
| 548 |
| 549 if.then2: ; preds = %if.end |
| 550 call void @func() |
| 551 br label %if.end3 |
| 552 |
| 553 if.end3: ; preds = %if.then2, %if.end |
| 554 ret void |
| 555 } |
| 556 ; CHECK: icmpLt64: |
| 557 ; CHECK: jb |
| 558 ; CHECK: ja |
| 559 ; CHECK: jb |
| 560 ; CHECK: call |
| 561 ; CHECK: jl |
| 562 ; CHECK: jg |
| 563 ; CHECK: jb |
| 564 ; CHECK: call |
| 565 |
| 566 define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) { |
| 567 entry: |
| 568 %cmp = icmp ule i64 %a, %b |
| 569 br i1 %cmp, label %if.then, label %if.end |
| 570 |
| 571 if.then: ; preds = %entry |
| 572 call void @func() |
| 573 br label %if.end |
| 574 |
| 575 if.end: ; preds = %if.then, %entry |
| 576 %cmp1 = icmp sle i64 %c, %d |
| 577 br i1 %cmp1, label %if.then2, label %if.end3 |
| 578 |
| 579 if.then2: ; preds = %if.end |
| 580 call void @func() |
| 581 br label %if.end3 |
| 582 |
| 583 if.end3: ; preds = %if.end, %if.then2 |
| 584 ret void |
| 585 } |
| 586 ; CHECK: icmpLe64: |
| 587 ; CHECK: jb |
| 588 ; CHECK: ja |
| 589 ; CHECK: jbe |
| 590 ; CHECK: call |
| 591 ; CHECK: jl |
| 592 ; CHECK: jg |
| 593 ; CHECK: jbe |
| 594 ; CHECK: call |
| 595 |
| 596 define internal i32 @icmpEq64Bool(i64 %a, i64 %b) { |
| 597 entry: |
| 598 %cmp = icmp eq i64 %a, %b |
| 599 %cmp.ret_ext = zext i1 %cmp to i32 |
| 600 ret i32 %cmp.ret_ext |
| 601 } |
| 602 ; CHECK: icmpEq64Bool: |
| 603 ; CHECK: jne |
| 604 ; CHECK: jne |
| 605 |
| 606 define internal i32 @icmpNe64Bool(i64 %a, i64 %b) { |
| 607 entry: |
| 608 %cmp = icmp ne i64 %a, %b |
| 609 %cmp.ret_ext = zext i1 %cmp to i32 |
| 610 ret i32 %cmp.ret_ext |
| 611 } |
| 612 ; CHECK: icmpNe64Bool: |
| 613 ; CHECK: jne |
| 614 ; CHECK: jne |
| 615 |
| 616 define internal i32 @icmpSgt64Bool(i64 %a, i64 %b) { |
| 617 entry: |
| 618 %cmp = icmp sgt i64 %a, %b |
| 619 %cmp.ret_ext = zext i1 %cmp to i32 |
| 620 ret i32 %cmp.ret_ext |
| 621 } |
| 622 ; CHECK: icmpSgt64Bool: |
| 623 ; CHECK: cmp |
| 624 ; CHECK: jg |
| 625 ; CHECK: jl |
| 626 ; CHECK: cmp |
| 627 ; CHECK: ja |
| 628 |
| 629 define internal i32 @icmpUgt64Bool(i64 %a, i64 %b) { |
| 630 entry: |
| 631 %cmp = icmp ugt i64 %a, %b |
| 632 %cmp.ret_ext = zext i1 %cmp to i32 |
| 633 ret i32 %cmp.ret_ext |
| 634 } |
| 635 ; CHECK: icmpUgt64Bool: |
| 636 ; CHECK: cmp |
| 637 ; CHECK: ja |
| 638 ; CHECK: jb |
| 639 ; CHECK: cmp |
| 640 ; CHECK: ja |
| 641 |
| 642 define internal i32 @icmpSge64Bool(i64 %a, i64 %b) { |
| 643 entry: |
| 644 %cmp = icmp sge i64 %a, %b |
| 645 %cmp.ret_ext = zext i1 %cmp to i32 |
| 646 ret i32 %cmp.ret_ext |
| 647 } |
| 648 ; CHECK: icmpSge64Bool: |
| 649 ; CHECK: cmp |
| 650 ; CHECK: jg |
| 651 ; CHECK: jl |
| 652 ; CHECK: cmp |
| 653 ; CHECK: jae |
| 654 |
| 655 define internal i32 @icmpUge64Bool(i64 %a, i64 %b) { |
| 656 entry: |
| 657 %cmp = icmp uge i64 %a, %b |
| 658 %cmp.ret_ext = zext i1 %cmp to i32 |
| 659 ret i32 %cmp.ret_ext |
| 660 } |
| 661 ; CHECK: icmpUge64Bool: |
| 662 ; CHECK: cmp |
| 663 ; CHECK: ja |
| 664 ; CHECK: jb |
| 665 ; CHECK: cmp |
| 666 ; CHECK: jae |
| 667 |
| 668 define internal i32 @icmpSlt64Bool(i64 %a, i64 %b) { |
| 669 entry: |
| 670 %cmp = icmp slt i64 %a, %b |
| 671 %cmp.ret_ext = zext i1 %cmp to i32 |
| 672 ret i32 %cmp.ret_ext |
| 673 } |
| 674 ; CHECK: icmpSlt64Bool: |
| 675 ; CHECK: cmp |
| 676 ; CHECK: jl |
| 677 ; CHECK: jg |
| 678 ; CHECK: cmp |
| 679 ; CHECK: jb |
| 680 |
| 681 define internal i32 @icmpUlt64Bool(i64 %a, i64 %b) { |
| 682 entry: |
| 683 %cmp = icmp ult i64 %a, %b |
| 684 %cmp.ret_ext = zext i1 %cmp to i32 |
| 685 ret i32 %cmp.ret_ext |
| 686 } |
| 687 ; CHECK: icmpUlt64Bool: |
| 688 ; CHECK: cmp |
| 689 ; CHECK: jb |
| 690 ; CHECK: ja |
| 691 ; CHECK: cmp |
| 692 ; CHECK: jb |
| 693 |
| 694 define internal i32 @icmpSle64Bool(i64 %a, i64 %b) { |
| 695 entry: |
| 696 %cmp = icmp sle i64 %a, %b |
| 697 %cmp.ret_ext = zext i1 %cmp to i32 |
| 698 ret i32 %cmp.ret_ext |
| 699 } |
| 700 ; CHECK: icmpSle64Bool: |
| 701 ; CHECK: cmp |
| 702 ; CHECK: jl |
| 703 ; CHECK: jg |
| 704 ; CHECK: cmp |
| 705 ; CHECK: jbe |
| 706 |
| 707 define internal i32 @icmpUle64Bool(i64 %a, i64 %b) { |
| 708 entry: |
| 709 %cmp = icmp ule i64 %a, %b |
| 710 %cmp.ret_ext = zext i1 %cmp to i32 |
| 711 ret i32 %cmp.ret_ext |
| 712 } |
| 713 ; CHECK: icmpUle64Bool: |
| 714 ; CHECK: cmp |
| 715 ; CHECK: jb |
| 716 ; CHECK: ja |
| 717 ; CHECK: cmp |
| 718 ; CHECK: jbe |
| 719 |
| 720 define internal i64 @load64(i32 %a) { |
| 721 entry: |
| 722 %a.asptr = inttoptr i32 %a to i64* |
| 723 %v0 = load i64* %a.asptr, align 1 |
| 724 ret i64 %v0 |
| 725 } |
| 726 ; CHECK: load64: |
| 727 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] |
| 728 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]] |
| 729 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]+4] |
| 730 |
| 731 define internal void @store64(i32 %a, i64 %value) { |
| 732 entry: |
| 733 %a.asptr = inttoptr i32 %a to i64* |
| 734 store i64 %value, i64* %a.asptr, align 1 |
| 735 ret void |
| 736 } |
| 737 ; CHECK: store64: |
| 738 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] |
| 739 ; CHECK: mov dword ptr [e[[REGISTER]]+4], |
| 740 ; CHECK: mov dword ptr [e[[REGISTER]]], |
| 741 |
| 742 define internal void @store64Const(i32 %a) { |
| 743 entry: |
| 744 %a.asptr = inttoptr i32 %a to i64* |
| 745 store i64 -2401053092306725256, i64* %a.asptr, align 1 |
| 746 ret void |
| 747 } |
| 748 ; CHECK: store64Const: |
| 749 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] |
| 750 ; CHECK: mov dword ptr [e[[REGISTER]]+4], 3735928559 |
| 751 ; CHECK: mov dword ptr [e[[REGISTER]]], 305419896 |
| 752 |
| 753 define internal i64 @select64VarVar(i64 %a, i64 %b) { |
| 754 entry: |
| 755 %cmp = icmp ult i64 %a, %b |
| 756 %cond = select i1 %cmp, i64 %a, i64 %b |
| 757 ret i64 %cond |
| 758 } |
| 759 ; CHECK: select64VarVar: |
| 760 ; CHECK: cmp |
| 761 ; CHECK: jb |
| 762 ; CHECK: ja |
| 763 ; CHECK: cmp |
| 764 ; CHECK: jb |
| 765 ; CHECK: cmp |
| 766 ; CHECK: jne |
| 767 |
| 768 define internal i64 @select64VarConst(i64 %a, i64 %b) { |
| 769 entry: |
| 770 %cmp = icmp ult i64 %a, %b |
| 771 %cond = select i1 %cmp, i64 %a, i64 -2401053092306725256 |
| 772 ret i64 %cond |
| 773 } |
| 774 ; CHECK: select64VarConst: |
| 775 ; CHECK: cmp |
| 776 ; CHECK: jb |
| 777 ; CHECK: ja |
| 778 ; CHECK: cmp |
| 779 ; CHECK: jb |
| 780 ; CHECK: cmp |
| 781 ; CHECK: jne |
| 782 |
| 783 define internal i64 @select64ConstVar(i64 %a, i64 %b) { |
| 784 entry: |
| 785 %cmp = icmp ult i64 %a, %b |
| 786 %cond = select i1 %cmp, i64 -2401053092306725256, i64 %b |
| 787 ret i64 %cond |
| 788 } |
| 789 ; CHECK: select64ConstVar: |
| 790 ; CHECK: cmp |
| 791 ; CHECK: jb |
| 792 ; CHECK: ja |
| 793 ; CHECK: cmp |
| 794 ; CHECK: jb |
| 795 ; CHECK: cmp |
| 796 ; CHECK: jne |
| 797 |
| 798 ; ERRORS-NOT: ICE translation error |
| 799 ; DUMP-NOT: SZ |
| OLD | NEW |
|---|
Chromium Code Reviews
Issue 205613002:
Initial skeleton of Subzero. (Closed)
Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master