Index: src/x64/assembler-x64.h |
diff --git a/src/x64/assembler-x64.h b/src/x64/assembler-x64.h |
index e23b72b84d509fb9fa888a0a12bb0576d2bd1aa4..d47ca32e0dd7f457d027438a4ff8db4b3a3ee100 100644 |
--- a/src/x64/assembler-x64.h |
+++ b/src/x64/assembler-x64.h |
@@ -511,6 +511,7 @@ class CpuFeatures : public AllStatic { |
#define ASSEMBLER_INSTRUCTION_LIST(V) \ |
V(add) \ |
+ V(and) \ |
V(cmp) \ |
V(dec) \ |
V(idiv) \ |
@@ -521,11 +522,14 @@ class CpuFeatures : public AllStatic { |
V(movzxb) \ |
V(movzxw) \ |
V(neg) \ |
+ V(not) \ |
+ V(or) \ |
V(repmovs) \ |
V(sbb) \ |
V(sub) \ |
V(test) \ |
- V(xchg) |
+ V(xchg) \ |
+ V(xor) |
class Assembler : public AssemblerBase { |
@@ -674,9 +678,7 @@ class Assembler : public AssemblerBase { |
// - Instructions on 16-bit (word) operands/registers have a trailing 'w'. |
// - Instructions on 32-bit (doubleword) operands/registers use 'l'. |
// - Instructions on 64-bit (quadword) operands/registers use 'q'. |
- // |
- // Some mnemonics, such as "and", are the same as C++ keywords. |
- // Naming conflicts with C++ keywords are resolved by adding a trailing '_'. |
+ // - Instructions on operands/registers with pointer size use 'p'. |
#define DECLARE_INSTRUCTION(instruction) \ |
template<class P1> \ |
@@ -839,38 +841,6 @@ class Assembler : public AssemblerBase { |
arithmetic_op_16(0x39, src, dst); |
} |
- void and_(Register dst, Register src) { |
- arithmetic_op(0x23, dst, src); |
- } |
- |
- void and_(Register dst, const Operand& src) { |
- arithmetic_op(0x23, dst, src); |
- } |
- |
- void and_(const Operand& dst, Register src) { |
- arithmetic_op(0x21, src, dst); |
- } |
- |
- void and_(Register dst, Immediate src) { |
- immediate_arithmetic_op(0x4, dst, src); |
- } |
- |
- void and_(const Operand& dst, Immediate src) { |
- immediate_arithmetic_op(0x4, dst, src); |
- } |
- |
- void andl(Register dst, Immediate src) { |
- immediate_arithmetic_op_32(0x4, dst, src); |
- } |
- |
- void andl(Register dst, Register src) { |
- arithmetic_op_32(0x23, dst, src); |
- } |
- |
- void andl(Register dst, const Operand& src) { |
- arithmetic_op_32(0x23, dst, src); |
- } |
- |
void andb(Register dst, Immediate src) { |
immediate_arithmetic_op_8(0x4, dst, src); |
} |
@@ -886,50 +856,6 @@ class Assembler : public AssemblerBase { |
// Multiply rax by src, put the result in rdx:rax. |
void mul(Register src); |
- void not_(Register dst); |
- void not_(const Operand& dst); |
- void notl(Register dst); |
- |
- void or_(Register dst, Register src) { |
- arithmetic_op(0x0B, dst, src); |
- } |
- |
- void orl(Register dst, Register src) { |
- arithmetic_op_32(0x0B, dst, src); |
- } |
- |
- void or_(Register dst, const Operand& src) { |
- arithmetic_op(0x0B, dst, src); |
- } |
- |
- void orl(Register dst, const Operand& src) { |
- arithmetic_op_32(0x0B, dst, src); |
- } |
- |
- void or_(const Operand& dst, Register src) { |
- arithmetic_op(0x09, src, dst); |
- } |
- |
- void orl(const Operand& dst, Register src) { |
- arithmetic_op_32(0x09, src, dst); |
- } |
- |
- void or_(Register dst, Immediate src) { |
- immediate_arithmetic_op(0x1, dst, src); |
- } |
- |
- void orl(Register dst, Immediate src) { |
- immediate_arithmetic_op_32(0x1, dst, src); |
- } |
- |
- void or_(const Operand& dst, Immediate src) { |
- immediate_arithmetic_op(0x1, dst, src); |
- } |
- |
- void orl(const Operand& dst, Immediate src) { |
- immediate_arithmetic_op_32(0x1, dst, src); |
- } |
- |
void rcl(Register dst, Immediate imm8) { |
shift(dst, imm8, 0x2); |
} |
@@ -1030,50 +956,6 @@ class Assembler : public AssemblerBase { |
void testb(const Operand& op, Immediate mask); |
void testb(const Operand& op, Register reg); |
- void xor_(Register dst, Register src) { |
- if (dst.code() == src.code()) { |
- arithmetic_op_32(0x33, dst, src); |
- } else { |
- arithmetic_op(0x33, dst, src); |
- } |
- } |
- |
- void xorl(Register dst, Register src) { |
- arithmetic_op_32(0x33, dst, src); |
- } |
- |
- void xorl(Register dst, const Operand& src) { |
- arithmetic_op_32(0x33, dst, src); |
- } |
- |
- void xorl(Register dst, Immediate src) { |
- immediate_arithmetic_op_32(0x6, dst, src); |
- } |
- |
- void xorl(const Operand& dst, Register src) { |
- arithmetic_op_32(0x31, src, dst); |
- } |
- |
- void xorl(const Operand& dst, Immediate src) { |
- immediate_arithmetic_op_32(0x6, dst, src); |
- } |
- |
- void xor_(Register dst, const Operand& src) { |
- arithmetic_op(0x33, dst, src); |
- } |
- |
- void xor_(const Operand& dst, Register src) { |
- arithmetic_op(0x31, src, dst); |
- } |
- |
- void xor_(Register dst, Immediate src) { |
- immediate_arithmetic_op(0x6, dst, src); |
- } |
- |
- void xor_(const Operand& dst, Immediate src) { |
- immediate_arithmetic_op(0x6, dst, src); |
- } |
- |
// Bit operations. |
void bt(const Operand& dst, Register src); |
void bts(const Operand& dst, Register src); |
@@ -1635,6 +1517,51 @@ class Assembler : public AssemblerBase { |
} |
} |
+ void emit_and(Register dst, Register src, int size) { |
+ if (size == kInt64Size) { |
+ arithmetic_op(0x23, dst, src); |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ arithmetic_op_32(0x23, dst, src); |
+ } |
+ } |
+ |
+ void emit_and(Register dst, const Operand& src, int size) { |
+ if (size == kInt64Size) { |
+ arithmetic_op(0x23, dst, src); |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ arithmetic_op_32(0x23, dst, src); |
+ } |
+ } |
+ |
+ void emit_and(const Operand& dst, Register src, int size) { |
+ if (size == kInt64Size) { |
+ arithmetic_op(0x21, src, dst); |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ arithmetic_op_32(0x21, src, dst); |
+ } |
+ } |
+ |
+ void emit_and(Register dst, Immediate src, int size) { |
+ if (size == kInt64Size) { |
+ immediate_arithmetic_op(0x4, dst, src); |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ immediate_arithmetic_op_32(0x4, dst, src); |
+ } |
+ } |
+ |
+ void emit_and(const Operand& dst, Immediate src, int size) { |
+ if (size == kInt64Size) { |
+ immediate_arithmetic_op(0x4, dst, src); |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ immediate_arithmetic_op_32(0x4, dst, src); |
+ } |
+ } |
+ |
void emit_cmp(Register dst, Register src, int size) { |
if (size == kInt64Size) { |
arithmetic_op(0x3B, dst, src); |
@@ -1713,6 +1640,49 @@ class Assembler : public AssemblerBase { |
void emit_neg(Register dst, int size); |
void emit_neg(const Operand& dst, int size); |
+ void emit_not(Register dst, int size); |
+ void emit_not(const Operand& dst, int size); |
+ |
+ void emit_or(Register dst, Register src, int size) { |
+ if (size == kInt64Size) { |
+ arithmetic_op(0x0B, dst, src); |
+ } else { |
+ arithmetic_op_32(0x0B, dst, src); |
+ } |
+ } |
+ |
+ void emit_or(Register dst, const Operand& src, int size) { |
+ if (size == kInt64Size) { |
+ arithmetic_op(0x0B, dst, src); |
+ } else { |
+ arithmetic_op_32(0x0B, dst, src); |
+ } |
+ } |
+ |
+ void emit_or(const Operand& dst, Register src, int size) { |
+ if (size == kInt64Size) { |
+ arithmetic_op(0x9, src, dst); |
+ } else { |
+ arithmetic_op_32(0x9, src, dst); |
+ } |
+ } |
+ |
+ void emit_or(Register dst, Immediate src, int size) { |
+ if (size == kInt64Size) { |
+ immediate_arithmetic_op(0x1, dst, src); |
+ } else { |
+ immediate_arithmetic_op_32(0x1, dst, src); |
+ } |
+ } |
+ |
+ void emit_or(const Operand& dst, Immediate src, int size) { |
+ if (size == kInt64Size) { |
+ immediate_arithmetic_op(0x1, dst, src); |
+ } else { |
+ immediate_arithmetic_op_32(0x1, dst, src); |
+ } |
+ } |
+ |
void emit_repmovs(int size); |
void emit_sbb(Register dst, Register src, int size) { |
@@ -1777,6 +1747,55 @@ class Assembler : public AssemblerBase { |
// Exchange two registers |
void emit_xchg(Register dst, Register src, int size); |
+ void emit_xor(Register dst, Register src, int size) { |
+ if (size == kInt64Size) { |
+ if (dst.code() == src.code()) { |
+ arithmetic_op_32(0x33, dst, src); |
+ } else { |
+ arithmetic_op(0x33, dst, src); |
+ } |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ arithmetic_op_32(0x33, dst, src); |
+ } |
+ } |
+ |
+ void emit_xor(Register dst, const Operand& src, int size) { |
+ if (size == kInt64Size) { |
+ arithmetic_op(0x33, dst, src); |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ arithmetic_op_32(0x33, dst, src); |
+ } |
+ } |
+ |
+ void emit_xor(Register dst, Immediate src, int size) { |
+ if (size == kInt64Size) { |
+ immediate_arithmetic_op(0x6, dst, src); |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ immediate_arithmetic_op_32(0x6, dst, src); |
+ } |
+ } |
+ |
+ void emit_xor(const Operand& dst, Immediate src, int size) { |
+ if (size == kInt64Size) { |
+ immediate_arithmetic_op(0x6, dst, src); |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ immediate_arithmetic_op_32(0x6, dst, src); |
+ } |
+ } |
+ |
+ void emit_xor(const Operand& dst, Register src, int size) { |
+ if (size == kInt64Size) { |
+ arithmetic_op(0x31, src, dst); |
+ } else { |
+ ASSERT(size == kInt32Size); |
+ arithmetic_op_32(0x31, src, dst); |
+ } |
+ } |
+ |
friend class CodePatcher; |
friend class EnsureSpace; |
friend class RegExpMacroAssemblerX64; |