| Index: src/x64/assembler-x64.h
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| diff --git a/src/x64/assembler-x64.h b/src/x64/assembler-x64.h
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| index e23b72b84d509fb9fa888a0a12bb0576d2bd1aa4..d47ca32e0dd7f457d027438a4ff8db4b3a3ee100 100644
|
| --- a/src/x64/assembler-x64.h
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| +++ b/src/x64/assembler-x64.h
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| @@ -511,6 +511,7 @@ class CpuFeatures : public AllStatic {
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|
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| #define ASSEMBLER_INSTRUCTION_LIST(V) \
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| V(add) \
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| + V(and) \
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| V(cmp) \
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| V(dec) \
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| V(idiv) \
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| @@ -521,11 +522,14 @@ class CpuFeatures : public AllStatic {
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| V(movzxb) \
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| V(movzxw) \
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| V(neg) \
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| + V(not) \
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| + V(or) \
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| V(repmovs) \
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| V(sbb) \
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| V(sub) \
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| V(test) \
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| - V(xchg)
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| + V(xchg) \
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| + V(xor)
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|
|
|
|
| class Assembler : public AssemblerBase {
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| @@ -674,9 +678,7 @@ class Assembler : public AssemblerBase {
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| // - Instructions on 16-bit (word) operands/registers have a trailing 'w'.
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| // - Instructions on 32-bit (doubleword) operands/registers use 'l'.
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| // - Instructions on 64-bit (quadword) operands/registers use 'q'.
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| - //
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| - // Some mnemonics, such as "and", are the same as C++ keywords.
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| - // Naming conflicts with C++ keywords are resolved by adding a trailing '_'.
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| + // - Instructions on operands/registers with pointer size use 'p'.
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|
|
| #define DECLARE_INSTRUCTION(instruction) \
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| template<class P1> \
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| @@ -839,38 +841,6 @@ class Assembler : public AssemblerBase {
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| arithmetic_op_16(0x39, src, dst);
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| }
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|
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| - void and_(Register dst, Register src) {
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| - arithmetic_op(0x23, dst, src);
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| - }
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| -
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| - void and_(Register dst, const Operand& src) {
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| - arithmetic_op(0x23, dst, src);
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| - }
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| -
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| - void and_(const Operand& dst, Register src) {
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| - arithmetic_op(0x21, src, dst);
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| - }
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| -
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| - void and_(Register dst, Immediate src) {
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| - immediate_arithmetic_op(0x4, dst, src);
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| - }
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| -
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| - void and_(const Operand& dst, Immediate src) {
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| - immediate_arithmetic_op(0x4, dst, src);
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| - }
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| -
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| - void andl(Register dst, Immediate src) {
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| - immediate_arithmetic_op_32(0x4, dst, src);
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| - }
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| -
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| - void andl(Register dst, Register src) {
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| - arithmetic_op_32(0x23, dst, src);
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| - }
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| -
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| - void andl(Register dst, const Operand& src) {
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| - arithmetic_op_32(0x23, dst, src);
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| - }
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| -
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| void andb(Register dst, Immediate src) {
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| immediate_arithmetic_op_8(0x4, dst, src);
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| }
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| @@ -886,50 +856,6 @@ class Assembler : public AssemblerBase {
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| // Multiply rax by src, put the result in rdx:rax.
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| void mul(Register src);
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|
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| - void not_(Register dst);
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| - void not_(const Operand& dst);
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| - void notl(Register dst);
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| -
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| - void or_(Register dst, Register src) {
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| - arithmetic_op(0x0B, dst, src);
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| - }
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| -
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| - void orl(Register dst, Register src) {
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| - arithmetic_op_32(0x0B, dst, src);
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| - }
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| -
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| - void or_(Register dst, const Operand& src) {
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| - arithmetic_op(0x0B, dst, src);
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| - }
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| -
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| - void orl(Register dst, const Operand& src) {
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| - arithmetic_op_32(0x0B, dst, src);
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| - }
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| -
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| - void or_(const Operand& dst, Register src) {
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| - arithmetic_op(0x09, src, dst);
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| - }
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| -
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| - void orl(const Operand& dst, Register src) {
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| - arithmetic_op_32(0x09, src, dst);
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| - }
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| -
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| - void or_(Register dst, Immediate src) {
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| - immediate_arithmetic_op(0x1, dst, src);
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| - }
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| -
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| - void orl(Register dst, Immediate src) {
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| - immediate_arithmetic_op_32(0x1, dst, src);
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| - }
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| -
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| - void or_(const Operand& dst, Immediate src) {
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| - immediate_arithmetic_op(0x1, dst, src);
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| - }
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| -
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| - void orl(const Operand& dst, Immediate src) {
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| - immediate_arithmetic_op_32(0x1, dst, src);
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| - }
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| -
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| void rcl(Register dst, Immediate imm8) {
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| shift(dst, imm8, 0x2);
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| }
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| @@ -1030,50 +956,6 @@ class Assembler : public AssemblerBase {
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| void testb(const Operand& op, Immediate mask);
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| void testb(const Operand& op, Register reg);
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|
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| - void xor_(Register dst, Register src) {
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| - if (dst.code() == src.code()) {
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| - arithmetic_op_32(0x33, dst, src);
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| - } else {
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| - arithmetic_op(0x33, dst, src);
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| - }
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| - }
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| -
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| - void xorl(Register dst, Register src) {
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| - arithmetic_op_32(0x33, dst, src);
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| - }
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| -
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| - void xorl(Register dst, const Operand& src) {
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| - arithmetic_op_32(0x33, dst, src);
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| - }
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| -
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| - void xorl(Register dst, Immediate src) {
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| - immediate_arithmetic_op_32(0x6, dst, src);
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| - }
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| -
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| - void xorl(const Operand& dst, Register src) {
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| - arithmetic_op_32(0x31, src, dst);
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| - }
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| -
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| - void xorl(const Operand& dst, Immediate src) {
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| - immediate_arithmetic_op_32(0x6, dst, src);
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| - }
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| -
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| - void xor_(Register dst, const Operand& src) {
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| - arithmetic_op(0x33, dst, src);
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| - }
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| -
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| - void xor_(const Operand& dst, Register src) {
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| - arithmetic_op(0x31, src, dst);
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| - }
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| -
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| - void xor_(Register dst, Immediate src) {
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| - immediate_arithmetic_op(0x6, dst, src);
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| - }
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| -
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| - void xor_(const Operand& dst, Immediate src) {
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| - immediate_arithmetic_op(0x6, dst, src);
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| - }
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| -
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| // Bit operations.
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| void bt(const Operand& dst, Register src);
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| void bts(const Operand& dst, Register src);
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| @@ -1635,6 +1517,51 @@ class Assembler : public AssemblerBase {
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| }
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| }
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|
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| + void emit_and(Register dst, Register src, int size) {
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| + if (size == kInt64Size) {
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| + arithmetic_op(0x23, dst, src);
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + arithmetic_op_32(0x23, dst, src);
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| + }
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| + }
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| +
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| + void emit_and(Register dst, const Operand& src, int size) {
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| + if (size == kInt64Size) {
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| + arithmetic_op(0x23, dst, src);
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + arithmetic_op_32(0x23, dst, src);
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| + }
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| + }
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| +
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| + void emit_and(const Operand& dst, Register src, int size) {
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| + if (size == kInt64Size) {
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| + arithmetic_op(0x21, src, dst);
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + arithmetic_op_32(0x21, src, dst);
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| + }
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| + }
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| +
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| + void emit_and(Register dst, Immediate src, int size) {
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| + if (size == kInt64Size) {
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| + immediate_arithmetic_op(0x4, dst, src);
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + immediate_arithmetic_op_32(0x4, dst, src);
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| + }
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| + }
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| +
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| + void emit_and(const Operand& dst, Immediate src, int size) {
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| + if (size == kInt64Size) {
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| + immediate_arithmetic_op(0x4, dst, src);
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + immediate_arithmetic_op_32(0x4, dst, src);
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| + }
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| + }
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| +
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| void emit_cmp(Register dst, Register src, int size) {
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| if (size == kInt64Size) {
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| arithmetic_op(0x3B, dst, src);
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| @@ -1713,6 +1640,49 @@ class Assembler : public AssemblerBase {
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| void emit_neg(Register dst, int size);
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| void emit_neg(const Operand& dst, int size);
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|
|
| + void emit_not(Register dst, int size);
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| + void emit_not(const Operand& dst, int size);
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| +
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| + void emit_or(Register dst, Register src, int size) {
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| + if (size == kInt64Size) {
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| + arithmetic_op(0x0B, dst, src);
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| + } else {
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| + arithmetic_op_32(0x0B, dst, src);
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| + }
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| + }
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| +
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| + void emit_or(Register dst, const Operand& src, int size) {
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| + if (size == kInt64Size) {
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| + arithmetic_op(0x0B, dst, src);
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| + } else {
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| + arithmetic_op_32(0x0B, dst, src);
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| + }
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| + }
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| +
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| + void emit_or(const Operand& dst, Register src, int size) {
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| + if (size == kInt64Size) {
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| + arithmetic_op(0x9, src, dst);
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| + } else {
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| + arithmetic_op_32(0x9, src, dst);
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| + }
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| + }
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| +
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| + void emit_or(Register dst, Immediate src, int size) {
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| + if (size == kInt64Size) {
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| + immediate_arithmetic_op(0x1, dst, src);
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| + } else {
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| + immediate_arithmetic_op_32(0x1, dst, src);
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| + }
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| + }
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| +
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| + void emit_or(const Operand& dst, Immediate src, int size) {
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| + if (size == kInt64Size) {
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| + immediate_arithmetic_op(0x1, dst, src);
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| + } else {
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| + immediate_arithmetic_op_32(0x1, dst, src);
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| + }
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| + }
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| +
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| void emit_repmovs(int size);
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|
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| void emit_sbb(Register dst, Register src, int size) {
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| @@ -1777,6 +1747,55 @@ class Assembler : public AssemblerBase {
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| // Exchange two registers
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| void emit_xchg(Register dst, Register src, int size);
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|
|
| + void emit_xor(Register dst, Register src, int size) {
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| + if (size == kInt64Size) {
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| + if (dst.code() == src.code()) {
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| + arithmetic_op_32(0x33, dst, src);
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| + } else {
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| + arithmetic_op(0x33, dst, src);
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| + }
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + arithmetic_op_32(0x33, dst, src);
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| + }
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| + }
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| +
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| + void emit_xor(Register dst, const Operand& src, int size) {
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| + if (size == kInt64Size) {
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| + arithmetic_op(0x33, dst, src);
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + arithmetic_op_32(0x33, dst, src);
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| + }
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| + }
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| +
|
| + void emit_xor(Register dst, Immediate src, int size) {
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| + if (size == kInt64Size) {
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| + immediate_arithmetic_op(0x6, dst, src);
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + immediate_arithmetic_op_32(0x6, dst, src);
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| + }
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| + }
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| +
|
| + void emit_xor(const Operand& dst, Immediate src, int size) {
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| + if (size == kInt64Size) {
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| + immediate_arithmetic_op(0x6, dst, src);
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + immediate_arithmetic_op_32(0x6, dst, src);
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| + }
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| + }
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| +
|
| + void emit_xor(const Operand& dst, Register src, int size) {
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| + if (size == kInt64Size) {
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| + arithmetic_op(0x31, src, dst);
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| + } else {
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| + ASSERT(size == kInt32Size);
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| + arithmetic_op_32(0x31, src, dst);
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| + }
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| + }
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| +
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| friend class CodePatcher;
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| friend class EnsureSpace;
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| friend class RegExpMacroAssemblerX64;
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|
|