src/IceInstMIPS32.def - Issue 2052793003: Calling convention for MIPS32

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Unified Diff: src/IceInstMIPS32.def

Issue 2052793003: Calling convention for MIPS32 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero@master

Patch Set: Addressed review comments Created 4 years, 6 months ago

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Index: src/IceInstMIPS32.def

diff --git a/src/IceInstMIPS32.def b/src/IceInstMIPS32.def

index 6120a47322e483595bf4fa6a93837a572f29c521..741ab069d1a239012cfa63460ccbb5e684c09b9d 100644

--- a/src/IceInstMIPS32.def

+++ b/src/IceInstMIPS32.def

@@ -123,10 +123,14 @@

X(Reg_F9, 9, "f9", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F9)) \

X(Reg_F10, 10, "f10", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F10)) \

X(Reg_F11, 11, "f11", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F11)) \

- X(Reg_F12, 12, "f12", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F12)) \

- X(Reg_F13, 13, "f13", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F13)) \

- X(Reg_F14, 14, "f14", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F14)) \

- X(Reg_F15, 15, "f15", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F15)) \

+ X(Reg_F12, 12, "f12", 1,0,0,0, 0,0,1,0,0, \

+ ALIASES2(Reg_F12, Reg_F12F13)) \

+ X(Reg_F13, 13, "f13", 1,0,0,0, 0,0,1,0,0, \

+ ALIASES2(Reg_F13, Reg_F12F13)) \

+ X(Reg_F14, 14, "f14", 1,0,0,0, 0,0,1,0,0, \

+ ALIASES2(Reg_F14, Reg_F14F15)) \

+ X(Reg_F15, 15, "f15", 1,0,0,0, 0,0,1,0,0, \

+ ALIASES2(Reg_F15, Reg_F14F15)) \

X(Reg_F16, 16, "f16", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F16)) \

X(Reg_F17, 17, "f17", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F17)) \

X(Reg_F18, 18, "f18", 1,0,0,0, 0,0,1,0,0, ALIASES1(Reg_F18)) \

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