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| 1 //===- subzero/src/IceRegistersMIPS32.h - Register information --*- C++ -*-===// | 1 //===- subzero/src/IceRegistersMIPS32.h - Register information --*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 82 return FPRRegister(RegNum - Reg_FPR_First); | 82 return FPRRegister(RegNum - Reg_FPR_First); |
| 83 } | 83 } |
| 84 | 84 |
| 85 static inline bool isFPRReg(RegNumT RegNum) { | 85 static inline bool isFPRReg(RegNumT RegNum) { |
| 86 return (int(Reg_FPR_First) <= int(RegNum)) && | 86 return (int(Reg_FPR_First) <= int(RegNum)) && |
| 87 (unsigned(RegNum) <= Reg_FPR_Last); | 87 (unsigned(RegNum) <= Reg_FPR_Last); |
| 88 } | 88 } |
| 89 | 89 |
| 90 const char *getRegName(RegNumT RegNum); | 90 const char *getRegName(RegNumT RegNum); |
| 91 | 91 |
| 92 static inline RegNumT getI64PairFirstGPRNum(RegNumT RegNum) { |
| 93 // For now it works only for argument register pairs |
| 94 // TODO(mohit.bhakkad): Change this to support all the register pairs once we |
| 95 // have table-driven approach ready |
| 96 assert(RegNum == Reg_A0A1 || RegNum == Reg_A2A3); |
| 97 return (RegNum == RegMIPS32::Reg_A0A1) ? RegMIPS32::Reg_A0 |
| 98 : RegMIPS32::Reg_A2; |
| 99 } |
| 100 |
| 101 static inline RegNumT getI64PairSecondGPRNum(RegNumT RegNum) { |
| 102 // For now it works only for argument register pairs |
| 103 // TODO(mohit.bhakkad): Change this to support all the register pairs once we |
| 104 // have table-driven approach ready |
| 105 assert(RegNum == Reg_A0A1 || RegNum == Reg_A2A3); |
| 106 return (RegNum == RegMIPS32::Reg_A0A1) ? RegMIPS32::Reg_A1 |
| 107 : RegMIPS32::Reg_A3; |
| 108 } |
| 109 |
| 92 } // end of namespace RegMIPS32 | 110 } // end of namespace RegMIPS32 |
| 93 | 111 |
| 94 // Extend enum RegClass with MIPS32-specific register classes (if any). | 112 // Extend enum RegClass with MIPS32-specific register classes (if any). |
| 95 enum RegClassMIPS32 : uint8_t { RCMIPS32_NUM = RC_Target }; | 113 enum RegClassMIPS32 : uint8_t { RCMIPS32_NUM = RC_Target }; |
| 96 | 114 |
| 97 } // end of namespace MIPS32 | 115 } // end of namespace MIPS32 |
| 98 } // end of namespace Ice | 116 } // end of namespace Ice |
| 99 | 117 |
| 100 #endif // SUBZERO_SRC_ICEREGISTERSMIPS32_H | 118 #endif // SUBZERO_SRC_ICEREGISTERSMIPS32_H |
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