Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(550)

Side by Side Diff: src/IceTargetLoweringMIPS32.h

Issue 2052793003: Calling convention for MIPS32 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero@master
Patch Set: Created 4 years, 6 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 441 matching lines...) Expand 10 before | Expand all | Expand 10 after
452 452
453 // Ensure that a 64-bit Variable has been split into 2 32-bit 453 // Ensure that a 64-bit Variable has been split into 2 32-bit
454 // Variables, creating them if necessary. This is needed for all 454 // Variables, creating them if necessary. This is needed for all
455 // I64 operations. 455 // I64 operations.
456 void split64(Variable *Var); 456 void split64(Variable *Var);
457 Operand *loOperand(Operand *Operand); 457 Operand *loOperand(Operand *Operand);
458 Operand *hiOperand(Operand *Operand); 458 Operand *hiOperand(Operand *Operand);
459 459
460 Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT()); 460 Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
461 461
462 /// Helper class that understands the Calling Convention and register
463 /// assignments.
464 class CallingConv {
465 CallingConv(const CallingConv &) = delete;
466 CallingConv &operator=(const CallingConv &) = delete;
467
468 public:
469 CallingConv();
470 ~CallingConv() = default;
471
472 /// argInGPR returns true if there is a GPR available for the requested
473 /// type, and false otherwise. If it returns true, Reg is set to the
474 /// appropriate register number. Note that, when Ty == IceType_i64, Reg will
475 /// be an I64 register pair.
476 bool argInGPR(Type Ty, RegNumT *Reg);
477
478 /// argInVFP is to floating-point/vector types what argInGPR is for integer
479 /// types.
480 bool argInVFP(Type Ty, RegNumT *Reg);
481
482 private:
483 void discardUnavailableGPRsAndTheirAliases(CfgVector<RegNumT> *Regs);
484 SmallBitVector GPRegsUsed;
485 CfgVector<RegNumT> GPRArgs;
486 CfgVector<RegNumT> I64Args;
487
488 void discardUnavailableVFPRegs(CfgVector<RegNumT> *Regs);
489 SmallBitVector VFPRegsUsed;
490 CfgVector<RegNumT> FP32Args;
491 CfgVector<RegNumT> FP64Args;
492 };
493
462 protected: 494 protected:
463 explicit TargetMIPS32(Cfg *Func); 495 explicit TargetMIPS32(Cfg *Func);
464 496
465 void postLower() override; 497 void postLower() override;
466 498
467 void lowerAlloca(const InstAlloca *Instr) override; 499 void lowerAlloca(const InstAlloca *Instr) override;
468 void lowerArithmetic(const InstArithmetic *Instr) override; 500 void lowerArithmetic(const InstArithmetic *Instr) override;
469 void lowerInt64Arithmetic(const InstArithmetic *Instr, Variable *Dest, 501 void lowerInt64Arithmetic(const InstArithmetic *Instr, Variable *Dest,
470 Operand *Src0, Operand *Src1); 502 Operand *Src0, Operand *Src1);
471 void lowerAssign(const InstAssign *Instr) override; 503 void lowerAssign(const InstAssign *Instr) override;
(...skipping 145 matching lines...) Expand 10 before | Expand all | Expand 10 after
617 explicit TargetHeaderMIPS32(GlobalContext *Ctx); 649 explicit TargetHeaderMIPS32(GlobalContext *Ctx);
618 650
619 private: 651 private:
620 ~TargetHeaderMIPS32() = default; 652 ~TargetHeaderMIPS32() = default;
621 }; 653 };
622 654
623 } // end of namespace MIPS32 655 } // end of namespace MIPS32
624 } // end of namespace Ice 656 } // end of namespace Ice
625 657
626 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H 658 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698