[arm] BitcastF32U32 uses float registers.

src/compiler/arm/instruction-codes-arm.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 76 matching lines @@
   V(ArmVcvtF64F32)                 \
   V(ArmVcvtF32S32)                 \
   V(ArmVcvtF32U32)                 \
   V(ArmVcvtF64S32)                 \
   V(ArmVcvtF64U32)                 \
   V(ArmVcvtS32F32)                 \
   V(ArmVcvtU32F32)                 \
   V(ArmVcvtS32F64)                 \
   V(ArmVcvtU32F64)                 \
   V(ArmVmovU32F32)                 \
+  V(ArmVmovF32U32)                 \
   V(ArmVmovLowU32F64)              \
   V(ArmVmovLowF64U32)              \
   V(ArmVmovHighU32F64)             \
   V(ArmVmovHighF64U32)             \
   V(ArmVmovF64U32U32)              \
   V(ArmVldrF32)                    \
   V(ArmVstrF32)                    \
   V(ArmVldrF64)                    \
   V(ArmVstrF64)                    \
   V(ArmFloat32Max)                 \
@@ skipping 27 matching lines @@
   V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \
   V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \
   V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \
   V(Operand2_R_ROR_R) /* %r0 ROR %r1 */
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_