Adding float/double support in CopyToReg

src/IceTargetLoweringMIPS32.cpp

 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
@@ skipping 1547 matching lines @@
   if (getFlags().getDisableTranslation())
     return;
   UnimplementedError(getFlags());
 }
 
 // Helper for legalize() to emit the right code to lower an operand to a
 // register of the appropriate type.
 Variable *TargetMIPS32::copyToReg(Operand *Src, RegNumT RegNum) {
   Type Ty = Src->getType();
   Variable *Reg = makeReg(Ty, RegNum);
-  if (isVectorType(Ty) || isFloatingType(Ty)) {
+  if (isVectorType(Ty)) {
     UnimplementedError(getFlags());
+  } else if (isFloatingType(Ty)) {
+    (Ty == IceType_f32) ? _mov_s(Reg, llvm::dyn_cast<Variable>(Src))
+                        : _mov_d(Reg, llvm::dyn_cast<Variable>(Src));
   } else {
     // Mov's Src operand can really only be the flexible second operand type
     // or a register. Users should guarantee that.
     _mov(Reg, Src);
   }
   return Reg;
 }
 
 Operand *TargetMIPS32::legalize(Operand *From, LegalMask Allowed,
                                 RegNumT RegNum) {
@@ skipping 134 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice