| Index: tools/traceline/traceline/sidestep/mini_disassembler.h
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| diff --git a/tools/traceline/traceline/sidestep/mini_disassembler.h b/tools/traceline/traceline/sidestep/mini_disassembler.h
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| new file mode 100755
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| index 0000000000000000000000000000000000000000..c62d00627dab98cfbf3b089415da4f504df6ce64
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| +++ b/tools/traceline/traceline/sidestep/mini_disassembler.h
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| @@ -0,0 +1,156 @@
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| +// Copyright (c) 2006-2008 The Chromium Authors. All rights reserved.
|
| +// Use of this source code is governed by a BSD-style license that can be
|
| +// found in the LICENSE file.
|
| +// Definition of MiniDisassembler.
|
| +
|
| +#ifndef TRACELINE_SIDESTEP_MINI_DISASSEMBLER_H_
|
| +#define TRACELINE_SIDESTEP_MINI_DISASSEMBLER_H_
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| +
|
| +#include "sidestep/mini_disassembler_types.h"
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| +
|
| +namespace sidestep {
|
| +
|
| +// This small disassembler is very limited
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| +// in its functionality, and in fact does only the bare minimum required by the
|
| +// preamble patching utility. It may be useful for other purposes, however.
|
| +//
|
| +// The limitations include at least the following:
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| +// -# No support for coprocessor opcodes, MMX, etc.
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| +// -# No machine-readable identification of opcodes or decoding of
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| +// assembly parameters. The name of the opcode (as a string) is given,
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| +// however, to aid debugging.
|
| +//
|
| +// You may ask what this little disassembler actually does, then? The answer is
|
| +// that it does the following, which is exactly what the patching utility needs:
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| +// -# Indicates if opcode is a jump (any kind) or a return (any kind)
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| +// because this is important for the patching utility to determine if
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| +// a function is too short or there are jumps too early in it for it
|
| +// to be preamble patched.
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| +// -# The opcode length is always calculated, so that the patching utility
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| +// can figure out where the next instruction starts, and whether it
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| +// already has enough instructions to replace with the absolute jump
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| +// to the patching code.
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| +//
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| +// The usage is quite simple; just create a MiniDisassembler and use its
|
| +// Disassemble() method.
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| +//
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| +// If you would like to extend this disassembler, please refer to the
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| +// IA-32 Intel Architecture Software Developer's Manual Volume 2:
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| +// Instruction Set Reference for information about operand decoding
|
| +// etc.
|
| +class MiniDisassembler {
|
| + public:
|
| +
|
| + // Creates a new instance and sets defaults.
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| + //
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| + // operand_default_32_bits: If true, the default operand size is
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| + // set to 32 bits, which is the default under Win32. Otherwise it is 16 bits.
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| + // address_default_32_bits: If true, the default address size is
|
| + // set to 32 bits, which is the default under Win32. Otherwise it is 16 bits.
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| + MiniDisassembler(bool operand_default_32_bits,
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| + bool address_default_32_bits);
|
| +
|
| + // Equivalent to MiniDisassembler(true, true);
|
| + MiniDisassembler();
|
| +
|
| + // Attempts to disassemble a single instruction starting from the
|
| + // address in memory it is pointed to.
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| + //
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| + // start: Address where disassembly should start.
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| + // instruction_bytes: Variable that will be incremented by
|
| + // the length in bytes of the instruction.
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| + // Returns enItJump, enItReturn or enItGeneric on success. enItUnknown
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| + // if unable to disassemble, enItUnused if this seems to be an unused
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| + // opcode. In the last two (error) cases, cbInstruction will be set
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| + // to 0xffffffff.
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| + //
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| + // Postcondition: This instance of the disassembler is ready to be used again,
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| + // with unchanged defaults from creation time.
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| + InstructionType Disassemble(unsigned char* start,
|
| + unsigned int* instruction_bytes);
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| +
|
| + private:
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| +
|
| + // Makes the disassembler ready for reuse.
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| + void Initialize();
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| +
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| + // Sets the flags for address and operand sizes.
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| + // Returns Number of prefix bytes.
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| + InstructionType ProcessPrefixes(unsigned char* start, unsigned int* size);
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| +
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| + // Sets the flag for whether we have ModR/M, and increments
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| + // operand_bytes_ if any are specifies by the opcode directly.
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| + // Returns Number of opcode bytes.
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| + InstructionType ProcessOpcode(unsigned char* start,
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| + unsigned int table,
|
| + unsigned int* size);
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| +
|
| + // Checks the type of the supplied operand. Increments
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| + // operand_bytes_ if it directly indicates an immediate etc.
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| + // operand. Asserts have_modrm_ if the operand specifies
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| + // a ModR/M byte.
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| + bool ProcessOperand(int flag_operand);
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| +
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| + // Increments operand_bytes_ by size specified by ModR/M and
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| + // by SIB if present.
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| + // Returns 0 in case of error, 1 if there is just a ModR/M byte,
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| + // 2 if there is a ModR/M byte and a SIB byte.
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| + bool ProcessModrm(unsigned char* start, unsigned int* size);
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| +
|
| + // Processes the SIB byte that it is pointed to.
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| + // start: Pointer to the SIB byte.
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| + // mod: The mod field from the ModR/M byte.
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| + // Returns 1 to indicate success (indicates 1 SIB byte)
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| + bool ProcessSib(unsigned char* start, unsigned char mod, unsigned int* size);
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| +
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| + // The instruction type we have decoded from the opcode.
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| + InstructionType instruction_type_;
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| +
|
| + // Counts the number of bytes that is occupied by operands in
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| + // the current instruction (note: we don't care about how large
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| + // operands stored in registers etc. are).
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| + unsigned int operand_bytes_;
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| +
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| + // True iff there is a ModR/M byte in this instruction.
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| + bool have_modrm_;
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| +
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| + // True iff we need to decode the ModR/M byte (sometimes it just
|
| + // points to a register, we can tell by the addressing mode).
|
| + bool should_decode_modrm_;
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| +
|
| + // Current operand size is 32 bits if true, 16 bits if false.
|
| + bool operand_is_32_bits_;
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| +
|
| + // Default operand size is 32 bits if true, 16 bits if false.
|
| + bool operand_default_is_32_bits_;
|
| +
|
| + // Current address size is 32 bits if true, 16 bits if false.
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| + bool address_is_32_bits_;
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| +
|
| + // Default address size is 32 bits if true, 16 bits if false.
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| + bool address_default_is_32_bits_;
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| +
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| + // Huge big opcode table based on the IA-32 manual, defined
|
| + // in Ia32OpcodeMap.cpp
|
| + static const OpcodeTable s_ia32_opcode_map_[];
|
| +
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| + // Somewhat smaller table to help with decoding ModR/M bytes
|
| + // when 16-bit addressing mode is being used. Defined in
|
| + // Ia32ModrmMap.cpp
|
| + static const ModrmEntry s_ia16_modrm_map_[];
|
| +
|
| + // Somewhat smaller table to help with decoding ModR/M bytes
|
| + // when 32-bit addressing mode is being used. Defined in
|
| + // Ia32ModrmMap.cpp
|
| + static const ModrmEntry s_ia32_modrm_map_[];
|
| +
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| + // Indicators of whether we got certain prefixes that certain
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| + // silly Intel instructions depend on in nonstandard ways for
|
| + // their behaviors.
|
| + bool got_f2_prefix_, got_f3_prefix_, got_66_prefix_;
|
| +};
|
| +
|
| +}; // namespace sidestep
|
| +
|
| +#endif // TRACELINE_SIDESTEP_MINI_DISASSEMBLER_H_
|
| +
|
|
|