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Unified Diff: tests_lit/llvm2ice_tests/fp.cmp.ll

Issue 2047043002: Subzero, MIPS32: Floating point comparison (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressing review comments Created 4 years, 3 months ago
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Index: tests_lit/llvm2ice_tests/fp.cmp.ll
diff --git a/tests_lit/llvm2ice_tests/fp.cmp.ll b/tests_lit/llvm2ice_tests/fp.cmp.ll
index 3a95cdd6a67a4fb8a062ac7220ad53fb6d691775..39c185010db63828b45a11f003bec0905551bbb9 100644
--- a/tests_lit/llvm2ice_tests/fp.cmp.ll
+++ b/tests_lit/llvm2ice_tests/fp.cmp.ll
@@ -18,6 +18,12 @@
; RUN: | %if --need=allow_dump --need=target_ARM32 --command FileCheck %s \
; RUN: --check-prefix=ARM32 --check-prefix=ARM32-OM1
+; RUN: %if --need=allow_dump --need=target_MIPS32 --command %p2i \
+; RUN: --filetype=asm --target mips32 -i %s --args -Om1 \
+; RUN: -allow-externally-defined-symbols --skip-unimplemented \
+; RUN: | %if --need=allow_dump --need=target_MIPS32 --command FileCheck %s \
+; RUN: --check-prefix=MIPS32
+
define internal void @fcmpEq(float %a, float %b, double %c, double %d) {
entry:
%cmp = fcmp oeq float %a, %b
@@ -67,6 +73,13 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32-OM1: mov [[R1:r[0-9]+]], #0
; ARM32-OM1: moveq [[R1]], #1
; ARM32-O2: bne
+; MIPS32-LABEL: fcmpEq
+; MIPS32-LABEL: .LfcmpEq$entry
+; MIPS32: c.eq.s
+; MIPS32: movf
+; MIPS32-LABEL: .LfcmpEq$if.end
+; MIPS32: c.eq.d
+; MIPS32: movf
declare void @func()
@@ -123,6 +136,13 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32-OM1: mov [[R1:r[0-9]+]], #0
; ARM32-OM1: movne [[R1]], #1
; ARM32-O2: beq
+; MIPS32-LABEL: fcmpNe
+; MIPS32-LABEL: .LfcmpNe$entry
+; MIPS32: c.eq.s
+; MIPS32: movt
+; MIPS32-LABEL: .LfcmpNe$if.end
+; MIPS32: c.eq.d
+; MIPS32: movt
define internal void @fcmpGt(float %a, float %b, double %c, double %d) {
entry:
@@ -169,6 +189,13 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32-OM1: mov [[R1:r[0-9]+]], #0
; ARM32-OM1: movgt [[R1]], #1
; ARM32-O2: ble
+; MIPS32-LABEL: fcmpGt
+; MIPS32-LABEL: .LfcmpGt$entry
+; MIPS32: c.ule.s
+; MIPS32: movt
+; MIPS32-LABEL: .LfcmpGt$if.end
+; MIPS32: c.ule.d
+; MIPS32: movt
define internal void @fcmpGe(float %a, float %b, double %c, double %d) {
entry:
@@ -215,6 +242,13 @@ if.end3: ; preds = %if.end, %if.then2
; ARM32-OM1: mov [[R1:r[0-9]+]], #0
; ARM32-OM1: movlt [[R1]], #1
; ARM32-O2: blt
+; MIPS32-LABEL: fcmpGe
+; MIPS32-LABEL: .LfcmpGe$entry
+; MIPS32: c.ult.s
+; MIPS32: movf
+; MIPS32-LABEL: .LfcmpGe$if.end
+; MIPS32: c.ult.d
+; MIPS32: movf
define internal void @fcmpLt(float %a, float %b, double %c, double %d) {
entry:
@@ -261,6 +295,13 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32-OM1: mov [[R1:r[0-9]+]], #0
; ARM32-OM1: movmi [[R1]], #1
; ARM32-O2: bpl
+; MIPS32-LABEL: fcmpLt
+; MIPS32-LABEL: .LfcmpLt$entry
+; MIPS32: c.olt.s
+; MIPS32: movf
+; MIPS32-LABEL: .LfcmpLt$if.end
+; MIPS32: c.olt.d
+; MIPS32: movf
define internal void @fcmpLe(float %a, float %b, double %c, double %d) {
entry:
@@ -307,6 +348,13 @@ if.end3: ; preds = %if.end, %if.then2
; ARM32-OM1: mov [[R1:r[0-9]+]], #0
; ARM32-OM1: movhi [[R1]], #1
; ARM32-O2: bhi
+; MIPS32-LABEL: fcmpLe
+; MIPS32-LABEL: .LfcmpLe$entry
+; MIPS32: c.ole.s
+; MIPS32: movt
+; MIPS32-LABEL: .LfcmpLe$if.end
+; MIPS32: c.ole.d
+; MIPS32: movt
define internal i32 @fcmpFalseFloat(float %a, float %b) {
entry:
@@ -318,6 +366,9 @@ entry:
; CHECK: mov {{.*}},0x0
; ARM32-LABEL: fcmpFalseFloat
; ARM32: mov [[R:r[0-9]+]], #0
+; MIPS32-LABEL: fcmpFalseFloat
+; MIPS32: addiu
+; MIPS32: sb
define internal i32 @fcmpFalseDouble(double %a, double %b) {
entry:
@@ -329,6 +380,9 @@ entry:
; CHECK: mov {{.*}},0x0
; ARM32-LABEL: fcmpFalseDouble
; ARM32: mov [[R:r[0-9]+]], #0
+; MIPS32-LABEL: fcmpFalseDouble
+; MIPS32: addiu
+; MIPS32: sb
define internal i32 @fcmpOeqFloat(float %a, float %b) {
entry:
@@ -346,6 +400,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: moveq [[R]], #1
+; MIPS32-LABEL: fcmpOeqFloat
+; MIPS32: c.eq.s
+; MIPS32: movf
define internal i32 @fcmpOeqDouble(double %a, double %b) {
entry:
@@ -363,6 +420,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: moveq [[R]], #1
+; MIPS32-LABEL: fcmpOeqDouble
+; MIPS32: c.eq.d
+; MIPS32: movf
define internal i32 @fcmpOgtFloat(float %a, float %b) {
entry:
@@ -379,6 +439,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movgt [[R]], #1
+; MIPS32-LABEL: fcmpOgtFloat
+; MIPS32: c.ule.s
+; MIPS32: movt
define internal i32 @fcmpOgtDouble(double %a, double %b) {
entry:
@@ -395,6 +458,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movgt [[R]], #1
+; MIPS32-LABEL: fcmpOgtDouble
+; MIPS32: c.ule.d
+; MIPS32: movt
define internal i32 @fcmpOgeFloat(float %a, float %b) {
entry:
@@ -411,6 +477,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movge [[R]], #1
+; MIPS32-LABEL: fcmpOgeFloat
+; MIPS32: c.ult.s
+; MIPS32: movt
define internal i32 @fcmpOgeDouble(double %a, double %b) {
entry:
@@ -427,6 +496,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movge [[R]], #1
+; MIPS32-LABEL: fcmpOgeDouble
+; MIPS32: c.ult.d
+; MIPS32: movt
define internal i32 @fcmpOltFloat(float %a, float %b) {
entry:
@@ -443,6 +515,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movmi [[R]], #1
+; MIPS32-LABEL: fcmpOltFloat
+; MIPS32: c.olt.s
+; MIPS32: movf
define internal i32 @fcmpOltDouble(double %a, double %b) {
entry:
@@ -459,6 +534,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movmi [[R]], #1
+; MIPS32-LABEL: fcmpOltDouble
+; MIPS32: c.olt.d
+; MIPS32: movf
define internal i32 @fcmpOleFloat(float %a, float %b) {
entry:
@@ -475,6 +553,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movls [[R]], #1
+; MIPS32-LABEL: fcmpOleFloat
+; MIPS32: c.ole.s
+; MIPS32: movf
define internal i32 @fcmpOleDouble(double %a, double %b) {
entry:
@@ -491,6 +572,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movls [[R]], #1
+; MIPS32-LABEL: fcmpOleDouble
+; MIPS32: c.ole.d
+; MIPS32: movf
define internal i32 @fcmpOneFloat(float %a, float %b) {
entry:
@@ -508,6 +592,9 @@ entry:
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movmi [[R]], #1
; ARM32: movgt [[R]], #1
+; MIPS32-LABEL: fcmpOneFloat
+; MIPS32: c.ueq.s
+; MIPS32: movt
define internal i32 @fcmpOneDouble(double %a, double %b) {
entry:
@@ -525,6 +612,9 @@ entry:
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movmi [[R]], #1
; ARM32: movgt [[R]], #1
+; MIPS32-LABEL: fcmpOneDouble
+; MIPS32: c.ueq.d
+; MIPS32: movt
define internal i32 @fcmpOrdFloat(float %a, float %b) {
entry:
@@ -541,6 +631,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movvc [[R]], #1
+; MIPS32-LABEL: fcmpOrdFloat
+; MIPS32: c.un.s
+; MIPS32: movt
define internal i32 @fcmpOrdDouble(double %a, double %b) {
entry:
@@ -557,6 +650,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movvc [[R]], #1
+; MIPS32-LABEL: fcmpOrdDouble
+; MIPS32: c.un.d
+; MIPS32: movt
define internal i32 @fcmpUeqFloat(float %a, float %b) {
entry:
@@ -574,6 +670,9 @@ entry:
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: moveq [[R]], #1
; ARM32: movvs [[R]], #1
+; MIPS32-LABEL: fcmpUeqFloat
+; MIPS32: c.ueq.s
+; MIPS32: movf
define internal i32 @fcmpUeqDouble(double %a, double %b) {
entry:
@@ -591,6 +690,9 @@ entry:
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: moveq [[R]], #1
; ARM32: movvs [[R]], #1
+; MIPS32-LABEL: fcmpUeqDouble
+; MIPS32: c.ueq.d
+; MIPS32: movf
define internal i32 @fcmpUgtFloat(float %a, float %b) {
entry:
@@ -607,6 +709,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movhi [[R]], #1
+; MIPS32-LABEL: fcmpUgtFloat
+; MIPS32: c.ole.s
+; MIPS32: movt
define internal i32 @fcmpUgtDouble(double %a, double %b) {
entry:
@@ -623,6 +728,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movhi [[R]], #1
+; MIPS32-LABEL: fcmpUgtDouble
+; MIPS32: c.ole.d
+; MIPS32: movt
define internal i32 @fcmpUgeFloat(float %a, float %b) {
entry:
@@ -639,6 +747,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movpl [[R]], #1
+; MIPS32-LABEL: fcmpUgeFloat
+; MIPS32: c.olt.s
+; MIPS32: movt
define internal i32 @fcmpUgeDouble(double %a, double %b) {
entry:
@@ -655,6 +766,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movpl [[R]], #1
+; MIPS32-LABEL: fcmpUgeDouble
+; MIPS32: c.olt.d
+; MIPS32: movt
define internal i32 @fcmpUltFloat(float %a, float %b) {
entry:
@@ -671,6 +785,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movlt [[R]], #1
+; MIPS32-LABEL: fcmpUltFloat
+; MIPS32: c.ult.s
+; MIPS32: movf
define internal i32 @fcmpUltDouble(double %a, double %b) {
entry:
@@ -687,6 +804,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movlt [[R]], #1
+; MIPS32-LABEL: fcmpUltDouble
+; MIPS32: c.ult.d
+; MIPS32: movf
define internal i32 @fcmpUleFloat(float %a, float %b) {
entry:
@@ -703,6 +823,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movle [[R]], #1
+; MIPS32-LABEL: fcmpUleFloat
+; MIPS32: c.ule.s
+; MIPS32: movf
define internal i32 @fcmpUleDouble(double %a, double %b) {
entry:
@@ -719,6 +842,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movle [[R]], #1
+; MIPS32-LABEL: fcmpUleDouble
+; MIPS32: c.ule.d
+; MIPS32: movf
define internal i32 @fcmpUneFloat(float %a, float %b) {
entry:
@@ -736,6 +862,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movne [[R]], #1
+; MIPS32-LABEL: fcmpUneFloat
+; MIPS32: c.eq.s
+; MIPS32: movt
define internal i32 @fcmpUneDouble(double %a, double %b) {
entry:
@@ -753,6 +882,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movne [[R]], #1
+; MIPS32-LABEL: fcmpUneDouble
+; MIPS32: c.eq.d
+; MIPS32: movt
define internal i32 @fcmpUnoFloat(float %a, float %b) {
entry:
@@ -769,6 +901,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movvs [[R]], #1
+; MIPS32-LABEL: fcmpUnoFloat
+; MIPS32: c.un.s
+; MIPS32: movf
define internal i32 @fcmpUnoDouble(double %a, double %b) {
entry:
@@ -785,6 +920,9 @@ entry:
; ARM32: vmrs
; ARM32-OM1: mov [[R:r[0-9]+]], #0
; ARM32: movvs [[R]], #1
+; MIPS32-LABEL: fcmpUnoDouble
+; MIPS32: c.un.d
+; MIPS32: movf
define internal i32 @fcmpTrueFloat(float %a, float %b) {
entry:
@@ -796,6 +934,9 @@ entry:
; CHECK: mov {{.*}},0x1
; ARM32-LABEL: fcmpTrueFloat
; ARM32: mov {{r[0-9]+}}, #1
+; MIPS32-LABEL: fcmpTrueFloat
+; MIPS32: addiu
+; MIPS32: sb
define internal i32 @fcmpTrueDouble(double %a, double %b) {
entry:
@@ -807,6 +948,9 @@ entry:
; CHECK: mov {{.*}},0x1
; ARM32-LABEL: fcmpTrueDouble
; ARM32: mov {{r[0-9]+}}, #1
+; MIPS32-LABEL: fcmpTrueDouble
+; MIPS32: addiu
+; MIPS32: sb
define internal float @selectFloatVarVar(float %a, float %b) {
entry:
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