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| 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 189 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 200 } | 200 } |
| 201 | 201 |
| 202 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) { | 202 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 203 Context.insert<InstMIPS32Add_s>(Dest, Src0, Src1); | 203 Context.insert<InstMIPS32Add_s>(Dest, Src0, Src1); |
| 204 } | 204 } |
| 205 | 205 |
| 206 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) { | 206 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) { |
| 207 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm); | 207 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm); |
| 208 } | 208 } |
| 209 | 209 |
| 210 void _c_eq_d(Variable *Src0, Variable *Src1) { |
| 211 Context.insert<InstMIPS32C_eq_d>(Src0, Src1); |
| 212 } |
| 213 |
| 214 void _c_eq_s(Variable *Src0, Variable *Src1) { |
| 215 Context.insert<InstMIPS32C_eq_s>(Src0, Src1); |
| 216 } |
| 217 |
| 218 void _c_ole_d(Variable *Src0, Variable *Src1) { |
| 219 Context.insert<InstMIPS32C_ole_d>(Src0, Src1); |
| 220 } |
| 221 |
| 222 void _c_ole_s(Variable *Src0, Variable *Src1) { |
| 223 Context.insert<InstMIPS32C_ole_s>(Src0, Src1); |
| 224 } |
| 225 |
| 226 void _c_olt_d(Variable *Src0, Variable *Src1) { |
| 227 Context.insert<InstMIPS32C_olt_d>(Src0, Src1); |
| 228 } |
| 229 |
| 230 void _c_olt_s(Variable *Src0, Variable *Src1) { |
| 231 Context.insert<InstMIPS32C_olt_s>(Src0, Src1); |
| 232 } |
| 233 |
| 234 void _c_ueq_d(Variable *Src0, Variable *Src1) { |
| 235 Context.insert<InstMIPS32C_ueq_d>(Src0, Src1); |
| 236 } |
| 237 |
| 238 void _c_ueq_s(Variable *Src0, Variable *Src1) { |
| 239 Context.insert<InstMIPS32C_ueq_s>(Src0, Src1); |
| 240 } |
| 241 |
| 242 void _c_ule_d(Variable *Src0, Variable *Src1) { |
| 243 Context.insert<InstMIPS32C_ule_d>(Src0, Src1); |
| 244 } |
| 245 |
| 246 void _c_ule_s(Variable *Src0, Variable *Src1) { |
| 247 Context.insert<InstMIPS32C_ule_s>(Src0, Src1); |
| 248 } |
| 249 |
| 250 void _c_ult_d(Variable *Src0, Variable *Src1) { |
| 251 Context.insert<InstMIPS32C_ult_d>(Src0, Src1); |
| 252 } |
| 253 |
| 254 void _c_ult_s(Variable *Src0, Variable *Src1) { |
| 255 Context.insert<InstMIPS32C_ult_s>(Src0, Src1); |
| 256 } |
| 257 |
| 258 void _c_un_d(Variable *Src0, Variable *Src1) { |
| 259 Context.insert<InstMIPS32C_un_d>(Src0, Src1); |
| 260 } |
| 261 |
| 262 void _c_un_s(Variable *Src0, Variable *Src1) { |
| 263 Context.insert<InstMIPS32C_un_s>(Src0, Src1); |
| 264 } |
| 265 |
| 210 void _cvt_d_l(Variable *Dest, Variable *Src) { | 266 void _cvt_d_l(Variable *Dest, Variable *Src) { |
| 211 Context.insert<InstMIPS32Cvt_d_l>(Dest, Src); | 267 Context.insert<InstMIPS32Cvt_d_l>(Dest, Src); |
| 212 } | 268 } |
| 213 | 269 |
| 214 void _cvt_d_s(Variable *Dest, Variable *Src) { | 270 void _cvt_d_s(Variable *Dest, Variable *Src) { |
| 215 Context.insert<InstMIPS32Cvt_d_s>(Dest, Src); | 271 Context.insert<InstMIPS32Cvt_d_s>(Dest, Src); |
| 216 } | 272 } |
| 217 | 273 |
| 218 void _cvt_d_w(Variable *Dest, Variable *Src) { | 274 void _cvt_d_w(Variable *Dest, Variable *Src) { |
| 219 Context.insert<InstMIPS32Cvt_d_w>(Dest, Src); | 275 Context.insert<InstMIPS32Cvt_d_w>(Dest, Src); |
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| 280 } | 336 } |
| 281 | 337 |
| 282 void _mov_d(Variable *Dest, Variable *Src) { | 338 void _mov_d(Variable *Dest, Variable *Src) { |
| 283 Context.insert<InstMIPS32Mov_d>(Dest, Src); | 339 Context.insert<InstMIPS32Mov_d>(Dest, Src); |
| 284 } | 340 } |
| 285 | 341 |
| 286 void _mov_s(Variable *Dest, Variable *Src) { | 342 void _mov_s(Variable *Dest, Variable *Src) { |
| 287 Context.insert<InstMIPS32Mov_s>(Dest, Src); | 343 Context.insert<InstMIPS32Mov_s>(Dest, Src); |
| 288 } | 344 } |
| 289 | 345 |
| 346 void _movf(Variable *Src0, Variable *Src1, Operand *FCC) { |
| 347 Context.insert<InstMIPS32Movf>(Src0, Src1, FCC); |
| 348 } |
| 349 |
| 350 void _movt(Variable *Src0, Variable *Src1, Operand *FCC) { |
| 351 Context.insert<InstMIPS32Movt>(Src0, Src1, FCC); |
| 352 } |
| 353 |
| 290 void _mfc1(Variable *Dest, Variable *Src) { | 354 void _mfc1(Variable *Dest, Variable *Src) { |
| 291 Context.insert<InstMIPS32Mfc1>(Dest, Src); | 355 Context.insert<InstMIPS32Mfc1>(Dest, Src); |
| 292 } | 356 } |
| 293 | 357 |
| 294 void _mfhi(Variable *Dest, Operand *Src) { | 358 void _mfhi(Variable *Dest, Operand *Src) { |
| 295 Context.insert<InstMIPS32Mfhi>(Dest, Src); | 359 Context.insert<InstMIPS32Mfhi>(Dest, Src); |
| 296 } | 360 } |
| 297 | 361 |
| 298 void _mflo(Variable *Dest, Operand *Src) { | 362 void _mflo(Variable *Dest, Operand *Src) { |
| 299 Context.insert<InstMIPS32Mflo>(Dest, Src); | 363 Context.insert<InstMIPS32Mflo>(Dest, Src); |
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| 476 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT()); | 540 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT()); |
| 477 | 541 |
| 478 Variable *getZero() { | 542 Variable *getZero() { |
| 479 return getPhysicalRegister(RegMIPS32::Reg_ZERO, IceType_i32); | 543 return getPhysicalRegister(RegMIPS32::Reg_ZERO, IceType_i32); |
| 480 } | 544 } |
| 481 | 545 |
| 482 Variable *I32Reg(RegNumT RegNum = RegNumT()) { | 546 Variable *I32Reg(RegNumT RegNum = RegNumT()) { |
| 483 return makeReg(IceType_i32, RegNum); | 547 return makeReg(IceType_i32, RegNum); |
| 484 } | 548 } |
| 485 | 549 |
| 550 Variable *F32Reg(RegNumT RegNum = RegNumT()) { |
| 551 return makeReg(IceType_f32, RegNum); |
| 552 } |
| 553 |
| 554 Variable *F64Reg(RegNumT RegNum = RegNumT()) { |
| 555 return makeReg(IceType_f64, RegNum); |
| 556 } |
| 557 |
| 486 static Type stackSlotType(); | 558 static Type stackSlotType(); |
| 487 Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT()); | 559 Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT()); |
| 488 | 560 |
| 489 void unsetIfNonLeafFunc(); | 561 void unsetIfNonLeafFunc(); |
| 490 | 562 |
| 491 // Iterates over the CFG and determines the maximum outgoing stack arguments | 563 // Iterates over the CFG and determines the maximum outgoing stack arguments |
| 492 // bytes. This information is later used during addProlog() to pre-allocate | 564 // bytes. This information is later used during addProlog() to pre-allocate |
| 493 // the outargs area | 565 // the outargs area |
| 494 void findMaxStackOutArgsSize(); | 566 void findMaxStackOutArgsSize(); |
| 495 | 567 |
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| 742 explicit TargetHeaderMIPS32(GlobalContext *Ctx); | 814 explicit TargetHeaderMIPS32(GlobalContext *Ctx); |
| 743 | 815 |
| 744 private: | 816 private: |
| 745 ~TargetHeaderMIPS32() = default; | 817 ~TargetHeaderMIPS32() = default; |
| 746 }; | 818 }; |
| 747 | 819 |
| 748 } // end of namespace MIPS32 | 820 } // end of namespace MIPS32 |
| 749 } // end of namespace Ice | 821 } // end of namespace Ice |
| 750 | 822 |
| 751 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H | 823 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
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