Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(50)

Side by Side Diff: src/IceInstMIPS32.cpp

Issue 2047043002: Subzero, MIPS32: Floating point comparison (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressing review comments Created 4 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceInstMIPS32.h ('k') | src/IceTargetLoweringMIPS32.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===// 1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 /// \file 10 /// \file
(...skipping 51 matching lines...) Expand 10 before | Expand all | Expand 10 after
62 62
63 template <> const char *InstMIPS32Abs_d::Opcode = "abs.d"; 63 template <> const char *InstMIPS32Abs_d::Opcode = "abs.d";
64 template <> const char *InstMIPS32Abs_s::Opcode = "abs.s"; 64 template <> const char *InstMIPS32Abs_s::Opcode = "abs.s";
65 template <> const char *InstMIPS32Add::Opcode = "add"; 65 template <> const char *InstMIPS32Add::Opcode = "add";
66 template <> const char *InstMIPS32Add_d::Opcode = "add.d"; 66 template <> const char *InstMIPS32Add_d::Opcode = "add.d";
67 template <> const char *InstMIPS32Add_s::Opcode = "add.s"; 67 template <> const char *InstMIPS32Add_s::Opcode = "add.s";
68 template <> const char *InstMIPS32Addiu::Opcode = "addiu"; 68 template <> const char *InstMIPS32Addiu::Opcode = "addiu";
69 template <> const char *InstMIPS32Addu::Opcode = "addu"; 69 template <> const char *InstMIPS32Addu::Opcode = "addu";
70 template <> const char *InstMIPS32And::Opcode = "and"; 70 template <> const char *InstMIPS32And::Opcode = "and";
71 template <> const char *InstMIPS32Andi::Opcode = "andi"; 71 template <> const char *InstMIPS32Andi::Opcode = "andi";
72 template <> const char *InstMIPS32C_eq_d::Opcode = "c.eq.d";
73 template <> const char *InstMIPS32C_eq_s::Opcode = "c.eq.s";
74 template <> const char *InstMIPS32C_ole_d::Opcode = "c.ole.d";
75 template <> const char *InstMIPS32C_ole_s::Opcode = "c.ole.s";
76 template <> const char *InstMIPS32C_olt_d::Opcode = "c.olt.d";
77 template <> const char *InstMIPS32C_olt_s::Opcode = "c.olt.s";
78 template <> const char *InstMIPS32C_ueq_d::Opcode = "c.ueq.d";
79 template <> const char *InstMIPS32C_ueq_s::Opcode = "c.ueq.s";
80 template <> const char *InstMIPS32C_ule_d::Opcode = "c.ule.d";
81 template <> const char *InstMIPS32C_ule_s::Opcode = "c.ule.s";
82 template <> const char *InstMIPS32C_ult_d::Opcode = "c.ult.d";
83 template <> const char *InstMIPS32C_ult_s::Opcode = "c.ult.s";
84 template <> const char *InstMIPS32C_un_d::Opcode = "c.un.d";
85 template <> const char *InstMIPS32C_un_s::Opcode = "c.un.s";
72 template <> const char *InstMIPS32Cvt_d_l::Opcode = "cvt.d.l"; 86 template <> const char *InstMIPS32Cvt_d_l::Opcode = "cvt.d.l";
73 template <> const char *InstMIPS32Cvt_d_s::Opcode = "cvt.d.s"; 87 template <> const char *InstMIPS32Cvt_d_s::Opcode = "cvt.d.s";
74 template <> const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w"; 88 template <> const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w";
75 template <> const char *InstMIPS32Cvt_s_d::Opcode = "cvt.s.d"; 89 template <> const char *InstMIPS32Cvt_s_d::Opcode = "cvt.s.d";
76 template <> const char *InstMIPS32Cvt_s_l::Opcode = "cvt.s.l"; 90 template <> const char *InstMIPS32Cvt_s_l::Opcode = "cvt.s.l";
77 template <> const char *InstMIPS32Cvt_s_w::Opcode = "cvt.s.w"; 91 template <> const char *InstMIPS32Cvt_s_w::Opcode = "cvt.s.w";
78 template <> const char *InstMIPS32Div::Opcode = "div"; 92 template <> const char *InstMIPS32Div::Opcode = "div";
79 template <> const char *InstMIPS32Div_d::Opcode = "div.d"; 93 template <> const char *InstMIPS32Div_d::Opcode = "div.d";
80 template <> const char *InstMIPS32Div_s::Opcode = "div.s"; 94 template <> const char *InstMIPS32Div_s::Opcode = "div.s";
81 template <> const char *InstMIPS32Divu::Opcode = "divu"; 95 template <> const char *InstMIPS32Divu::Opcode = "divu";
82 template <> const char *InstMIPS32La::Opcode = "la"; 96 template <> const char *InstMIPS32La::Opcode = "la";
83 template <> const char *InstMIPS32Ldc1::Opcode = "ldc1"; 97 template <> const char *InstMIPS32Ldc1::Opcode = "ldc1";
84 template <> const char *InstMIPS32Lui::Opcode = "lui"; 98 template <> const char *InstMIPS32Lui::Opcode = "lui";
85 template <> const char *InstMIPS32Lw::Opcode = "lw"; 99 template <> const char *InstMIPS32Lw::Opcode = "lw";
86 template <> const char *InstMIPS32Lwc1::Opcode = "lwc1"; 100 template <> const char *InstMIPS32Lwc1::Opcode = "lwc1";
87 template <> const char *InstMIPS32Mfc1::Opcode = "mfc1"; 101 template <> const char *InstMIPS32Mfc1::Opcode = "mfc1";
88 template <> const char *InstMIPS32Mfhi::Opcode = "mfhi"; 102 template <> const char *InstMIPS32Mfhi::Opcode = "mfhi";
89 template <> const char *InstMIPS32Mflo::Opcode = "mflo"; 103 template <> const char *InstMIPS32Mflo::Opcode = "mflo";
90 template <> const char *InstMIPS32Mov_d::Opcode = "mov.d"; 104 template <> const char *InstMIPS32Mov_d::Opcode = "mov.d";
91 template <> const char *InstMIPS32Mov_s::Opcode = "mov.s"; 105 template <> const char *InstMIPS32Mov_s::Opcode = "mov.s";
106 template <> const char *InstMIPS32Movf::Opcode = "movf";
107 template <> const char *InstMIPS32Movt::Opcode = "movt";
92 template <> const char *InstMIPS32Mtc1::Opcode = "mtc1"; 108 template <> const char *InstMIPS32Mtc1::Opcode = "mtc1";
93 template <> const char *InstMIPS32Mthi::Opcode = "mthi"; 109 template <> const char *InstMIPS32Mthi::Opcode = "mthi";
94 template <> const char *InstMIPS32Mtlo::Opcode = "mtlo"; 110 template <> const char *InstMIPS32Mtlo::Opcode = "mtlo";
95 template <> const char *InstMIPS32Mul::Opcode = "mul"; 111 template <> const char *InstMIPS32Mul::Opcode = "mul";
96 template <> const char *InstMIPS32Mul_d::Opcode = "mul.d"; 112 template <> const char *InstMIPS32Mul_d::Opcode = "mul.d";
97 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s"; 113 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s";
98 template <> const char *InstMIPS32Mult::Opcode = "mult"; 114 template <> const char *InstMIPS32Mult::Opcode = "mult";
99 template <> const char *InstMIPS32Multu::Opcode = "multu"; 115 template <> const char *InstMIPS32Multu::Opcode = "multu";
100 template <> const char *InstMIPS32Or::Opcode = "or"; 116 template <> const char *InstMIPS32Or::Opcode = "or";
101 template <> const char *InstMIPS32Ori::Opcode = "ori"; 117 template <> const char *InstMIPS32Ori::Opcode = "ori";
(...skipping 735 matching lines...) Expand 10 before | Expand all | Expand 10 after
837 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const { 853 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const {
838 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); 854 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
839 auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0)); 855 auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
840 ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset()); 856 ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());
841 uint32_t Imm = static_cast<uint32_t>(Offset->getValue()); 857 uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
842 Asm->lw(getDest(), Mem->getBase(), Imm); 858 Asm->lw(getDest(), Mem->getBase(), Imm);
843 } 859 }
844 860
845 } // end of namespace MIPS32 861 } // end of namespace MIPS32
846 } // end of namespace Ice 862 } // end of namespace Ice
OLDNEW
« no previous file with comments | « src/IceInstMIPS32.h ('k') | src/IceTargetLoweringMIPS32.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698