Subzero, MIPS32: Floating point comparison

src/IceInstMIPS32.h

 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 37 matching lines @@
 /// OperandMips32 extends the Operand hierarchy.
 //
 class OperandMIPS32 : public Operand {
   OperandMIPS32() = delete;
   OperandMIPS32(const OperandMIPS32 &) = delete;
   OperandMIPS32 &operator=(const OperandMIPS32 &) = delete;
 
 public:
   enum OperandKindMIPS32 {
     k__Start = Operand::kTarget,
+    kFCC,
     kMem,
   };
 
   using Operand::dump;
   void dump(const Cfg *, Ostream &Str) const override {
     if (BuildDefs::dump())
       Str << "<OperandMIPS32>";
   }
 
 protected:
   OperandMIPS32(OperandKindMIPS32 Kind, Type Ty)
       : Operand(static_cast<OperandKind>(Kind), Ty) {}
 };
 
+class OperandMIPS32FCC : public OperandMIPS32 {
+  OperandMIPS32FCC() = delete;
+  OperandMIPS32FCC(const OperandMIPS32FCC &) = delete;
+  OperandMIPS32FCC &operator=(const OperandMIPS32FCC &) = delete;
+
+public:
+  enum FCC { FCC0 = 0, FCC1, FCC2, FCC3, FCC4, FCC5, FCC6, FCC7 };
+  static OperandMIPS32FCC *create(Cfg *Func, Type Ty,
+                                  OperandMIPS32FCC::FCC FCC) {
+    return new (Func->allocate<OperandMIPS32FCC>())
+        OperandMIPS32FCC(Func, Ty, FCC);
+  }
+
+  void emit(const Cfg *Func) const override {
+    Ostream &Str = Func->getContext()->getStrEmit();

[Jim Stichnoth, 2016/09/12 14:14:40]

Add the usual pattern at the beginning of emit() and dump().

  if (!BuildDefs.dump())
    return;

[obucinac, 2016/09/12 19:16:15]

Done.

+
+    Str << "$fcc" << (uint16_t)FCC;

[Jim Stichnoth, 2016/09/12 14:14:40]

static_cast<>

[obucinac, 2016/09/12 19:16:16]

Done.

+  }
+
+  static bool classof(const Operand *Operand) {
+    return Operand->getKind() == static_cast<OperandKind>(kFCC);
+  }
+
+  void dump(const Cfg *Func, Ostream &Str) const override {
+    (void)Func;
+    (void)Str;
+  }
+
+private:
+  OperandMIPS32FCC(Cfg *Func, Type Ty, OperandMIPS32FCC::FCC FCC)

[Jim Stichnoth, 2016/09/12 14:14:40]

Optional:
s/Func//
Then you can remove the void-cast of Func below.

[obucinac, 2016/09/12 19:16:16]

Done.

+      : OperandMIPS32(kFCC, Ty), FCC(FCC) {

[Jim Stichnoth, 2016/09/12 14:14:41]

I don't think the Type makes much sense here, especially since (assuming I
didn't miss something) the Type argument is always IceType_i32.

I would consider removing the Type argument, and maybe pass IceType_void to the
parent ctor.

[obucinac, 2016/09/12 19:16:15]

Done.

+    (void)Func;
+  };
+
+  OperandMIPS32FCC::FCC FCC;

[Jim Stichnoth, 2016/09/12 14:14:40]

const

[obucinac, 2016/09/12 19:16:15]

Done.

+};
+
 class OperandMIPS32Mem : public OperandMIPS32 {
   OperandMIPS32Mem() = delete;
   OperandMIPS32Mem(const OperandMIPS32Mem &) = delete;
   OperandMIPS32Mem &operator=(const OperandMIPS32Mem &) = delete;
 
 public:
   /// Memory operand addressing mode.
   /// The enum value also carries the encoding.
   // TODO(jvoung): unify with the assembler.
   enum AddrMode { Offset };
@@ skipping 64 matching lines @@
   enum InstKindMIPS32 {
     k__Start = Inst::Target,
     Add,
     Add_d,
     Add_s,
     Addiu,
     Addu,
     And,
     Andi,
     Br,
+    C_eq_d,
+    C_eq_s,
+    C_ole_d,
+    C_ole_s,
+    C_olt_d,
+    C_olt_s,
+    C_ueq_d,
+    C_ueq_s,
+    C_ule_d,
+    C_ule_s,
+    C_ult_d,
+    C_ult_s,
+    C_un_d,
+    C_un_s,
     Call,
     Cvt_d_l,
     Cvt_d_s,
     Cvt_d_w,
     Cvt_s_d,
     Cvt_s_l,
     Cvt_s_w,
     Div,
     Div_d,
     Div_s,
     Divu,
     La,
     Label,
     Ldc1,
     Lui,
     Lw,
     Lwc1,
     Mfc1,
     Mfhi,
     Mflo,
     Mov, // actually a pseudo op for addi rd, rs, 0
     Mov_d,
     Mov_s,
+    Movf,
+    Movt,
     Mtc1,
     Mthi,
     Mtlo,
     Mul,
     Mul_d,
     Mul_s,
     Mult,
     Multu,
     Or,
     Ori,
@@ skipping 606 matching lines @@
   Operand *getCallTarget() const { return getSrc(0); }
   void emit(const Cfg *Func) const override;
   void emitIAS(const Cfg *Func) const override;
   void dump(const Cfg *Func) const override;
   static bool classof(const Inst *Inst) { return isClassof(Inst, Call); }
 
 private:
   InstMIPS32Call(Cfg *Func, Variable *Dest, Operand *CallTarget);
 };
 
+template <InstMIPS32::InstKindMIPS32 K>

[Jim Stichnoth, 2016/09/12 14:14:40]

You may want to consider defining a single InstMIPS32FPCmp class, where the
condition code is stored as a class member, rather than templatizing it with the
condition code.  The latter may increase the code size of the class by 14x
(unless the compiler that builds Subzero does something clever, which I kind of
doubt).

The drawback of the parameterized approach is that you probably need to add the
x-macro machinery to IceInstMIPS32.def which would provide the mapping between
enum values, textual opcode strings, and operand types.

(This is just a suggestion, final decision is yours.)

[obucinac, 2016/09/12 19:16:15]

I would like to leave it as it is, for the consistency with other instruction
implementations.

+class InstMIPS32FPCmp : public InstMIPS32 {
+  InstMIPS32FPCmp() = delete;
+  InstMIPS32FPCmp(const InstMIPS32FPCmp &) = delete;
+  InstMIPS32Call &operator=(const InstMIPS32FPCmp &) = delete;
+
+public:
+  static InstMIPS32FPCmp *create(Cfg *Func, Variable *Src0, Variable *Src1) {
+    return new (Func->allocate<InstMIPS32FPCmp>())
+        InstMIPS32FPCmp(Func, Src0, Src1);
+  }
+
+  void emit(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrEmit();
+    assert(getSrcSize() == 2);
+    Str << "\t" << Opcode << "\t";
+    getSrc(0)->emit(Func);
+    Str << ", ";
+    getSrc(1)->emit(Func);
+  }
+
+  void emitIAS(const Cfg *Func) const override {
+    (void)Func;
+    llvm_unreachable("Not yet implemented");
+  }
+
+  void dump(const Cfg *Func) const override {
+    (void)Func;
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrDump();
+    dumpOpcode(Str, Opcode, getSrc(0)->getType());
+    Str << " ";
+    dumpSources(Func);
+  }
+
+  static bool classof(const Inst *Inst) { return isClassof(Inst, Call); }
+
+private:
+  InstMIPS32FPCmp(Cfg *Func, Variable *Src0, Variable *Src1)
+      : InstMIPS32(Func, K, 2, nullptr) {
+    addSource(Src0);
+    addSource(Src1);
+  };
+
+  static const char *Opcode;
+};
+
 template <InstMIPS32::InstKindMIPS32 K, bool Signed = false>
 class InstMIPS32Imm16 : public InstMIPS32 {
   InstMIPS32Imm16() = delete;
   InstMIPS32Imm16(const InstMIPS32Imm16 &) = delete;
   InstMIPS32Imm16 &operator=(const InstMIPS32Imm16 &) = delete;
 
 public:
   static InstMIPS32Imm16 *create(Cfg *Func, Variable *Dest, Operand *Source,
                                  uint32_t Imm) {
     return new (Func->allocate<InstMIPS32Imm16>())
@@ skipping 51 matching lines @@
   }
 
   InstMIPS32Imm16(Cfg *Func, Variable *Dest, uint32_t Imm)
       : InstMIPS32(Func, K, 0, Dest), Imm(Imm) {}
 
   static const char *Opcode;
 
   const uint32_t Imm;
 };
 
+/// Conditional mov
+template <InstMIPS32::InstKindMIPS32 K>
+class InstMIPS32MovConditional : public InstMIPS32 {
+  InstMIPS32MovConditional() = delete;
+  InstMIPS32MovConditional(const InstMIPS32MovConditional &) = delete;
+  InstMIPS32MovConditional &
+  operator=(const InstMIPS32MovConditional &) = delete;
+
+public:
+  static InstMIPS32MovConditional *create(Cfg *Func, Variable *Dest,
+                                          Variable *Src, Operand *FCC) {
+    return new (Func->allocate<InstMIPS32MovConditional>())
+        InstMIPS32MovConditional(Func, Dest, Src, FCC);
+  }
+
+  void emit(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrEmit();
+    assert(getSrcSize() == 2);
+    Str << "\t" << Opcode << "\t";
+    getDest()->emit(Func);
+    Str << ", ";
+    getSrc(0)->emit(Func);
+    Str << ", ";
+    getSrc(1)->emit(Func);
+  }
+
+  void emitIAS(const Cfg *Func) const override {
+    (void)Func;
+    llvm_unreachable("Not yet implemented");
+  }
+
+  void dump(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrDump();
+    dumpDest(Func);
+    Str << " = ";
+    dumpOpcode(Str, Opcode, getDest()->getType());
+    Str << " ";
+    dumpSources(Func);
+  }
+  static bool classof(const Inst *Inst) { return isClassof(Inst, K); }
+
+private:
+  InstMIPS32MovConditional(Cfg *Func, Variable *Dest, Variable *Src,
+                           Operand *FCC)
+      : InstMIPS32(Func, K, 2, Dest) {
+    addSource(Src);
+    addSource(FCC);
+  }
+
+  static const char *Opcode;
+};
+
 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>;
 using InstMIPS32Add_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_d>;
 using InstMIPS32Add_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_s>;
 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>;
 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>;
 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>;
 using InstMIPS32Andi = InstMIPS32Imm16<InstMIPS32::Andi>;
+using InstMIPS32C_eq_d = InstMIPS32FPCmp<InstMIPS32::C_eq_d>;
+using InstMIPS32C_eq_s = InstMIPS32FPCmp<InstMIPS32::C_eq_s>;
+using InstMIPS32C_ole_d = InstMIPS32FPCmp<InstMIPS32::C_ole_d>;
+using InstMIPS32C_ole_s = InstMIPS32FPCmp<InstMIPS32::C_ole_s>;
+using InstMIPS32C_olt_d = InstMIPS32FPCmp<InstMIPS32::C_olt_d>;
+using InstMIPS32C_olt_s = InstMIPS32FPCmp<InstMIPS32::C_olt_s>;
+using InstMIPS32C_ueq_d = InstMIPS32FPCmp<InstMIPS32::C_ueq_d>;
+using InstMIPS32C_ueq_s = InstMIPS32FPCmp<InstMIPS32::C_ueq_s>;
+using InstMIPS32C_ule_d = InstMIPS32FPCmp<InstMIPS32::C_ule_d>;
+using InstMIPS32C_ule_s = InstMIPS32FPCmp<InstMIPS32::C_ule_s>;
+using InstMIPS32C_ult_d = InstMIPS32FPCmp<InstMIPS32::C_ult_d>;
+using InstMIPS32C_ult_s = InstMIPS32FPCmp<InstMIPS32::C_ult_s>;
+using InstMIPS32C_un_d = InstMIPS32FPCmp<InstMIPS32::C_un_d>;
+using InstMIPS32C_un_s = InstMIPS32FPCmp<InstMIPS32::C_un_s>;
 using InstMIPS32Cvt_d_s = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_s>;
 using InstMIPS32Cvt_d_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_l>;
 using InstMIPS32Cvt_d_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_w>;
 using InstMIPS32Cvt_s_d = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_d>;
 using InstMIPS32Cvt_s_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_l>;
 using InstMIPS32Cvt_s_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_w>;
 using InstMIPS32Div = InstMIPS32ThreeAddrGPR<InstMIPS32::Div>;
 using InstMIPS32Div_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_d>;
 using InstMIPS32Div_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_s>;
 using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>;
 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>;
 using InstMIPS32Ldc1 = InstMIPS32Load<InstMIPS32::Ldc1>;
 using InstMIPS32Lui = InstMIPS32UnaryopGPR<InstMIPS32::Lui>;
 using InstMIPS32Lw = InstMIPS32Load<InstMIPS32::Lw>;
 using InstMIPS32Lwc1 = InstMIPS32Load<InstMIPS32::Lwc1>;
 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>;
 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>;
 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>;
+using InstMIPS32Movf = InstMIPS32MovConditional<InstMIPS32::Movf>;
+using InstMIPS32Movt = InstMIPS32MovConditional<InstMIPS32::Movt>;
 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>;
 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>;
 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>;
 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>;
 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>;
 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
@@ skipping 70 matching lines @@
 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
 template <> void InstMIPS32Lui::emit(const Cfg *Func) const;
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTMIPS32_H