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| 1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===// | 1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 /// \file | 10 /// \file |
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| 60 return "TBD"; | 60 return "TBD"; |
| 61 } | 61 } |
| 62 | 62 |
| 63 template <> const char *InstMIPS32Add::Opcode = "add"; | 63 template <> const char *InstMIPS32Add::Opcode = "add"; |
| 64 template <> const char *InstMIPS32Add_d::Opcode = "add.d"; | 64 template <> const char *InstMIPS32Add_d::Opcode = "add.d"; |
| 65 template <> const char *InstMIPS32Add_s::Opcode = "add.s"; | 65 template <> const char *InstMIPS32Add_s::Opcode = "add.s"; |
| 66 template <> const char *InstMIPS32Addiu::Opcode = "addiu"; | 66 template <> const char *InstMIPS32Addiu::Opcode = "addiu"; |
| 67 template <> const char *InstMIPS32Addu::Opcode = "addu"; | 67 template <> const char *InstMIPS32Addu::Opcode = "addu"; |
| 68 template <> const char *InstMIPS32And::Opcode = "and"; | 68 template <> const char *InstMIPS32And::Opcode = "and"; |
| 69 template <> const char *InstMIPS32Andi::Opcode = "andi"; | 69 template <> const char *InstMIPS32Andi::Opcode = "andi"; |
| 70 template <> const char *InstMIPS32C_eq_d::Opcode = "c.eq.d"; |
| 71 template <> const char *InstMIPS32C_eq_s::Opcode = "c.eq.s"; |
| 72 template <> const char *InstMIPS32C_ole_d::Opcode = "c.ole.d"; |
| 73 template <> const char *InstMIPS32C_ole_s::Opcode = "c.ole.s"; |
| 74 template <> const char *InstMIPS32C_olt_d::Opcode = "c.olt.d"; |
| 75 template <> const char *InstMIPS32C_olt_s::Opcode = "c.olt.s"; |
| 76 template <> const char *InstMIPS32C_ueq_d::Opcode = "c.ueq.d"; |
| 77 template <> const char *InstMIPS32C_ueq_s::Opcode = "c.ueq.s"; |
| 78 template <> const char *InstMIPS32C_ule_d::Opcode = "c.ule.d"; |
| 79 template <> const char *InstMIPS32C_ule_s::Opcode = "c.ule.s"; |
| 80 template <> const char *InstMIPS32C_ult_d::Opcode = "c.ult.d"; |
| 81 template <> const char *InstMIPS32C_ult_s::Opcode = "c.ult.s"; |
| 82 template <> const char *InstMIPS32C_un_d::Opcode = "c.un.d"; |
| 83 template <> const char *InstMIPS32C_un_s::Opcode = "c.un.s"; |
| 70 template <> const char *InstMIPS32Cvt_d_l::Opcode = "cvt.d.l"; | 84 template <> const char *InstMIPS32Cvt_d_l::Opcode = "cvt.d.l"; |
| 71 template <> const char *InstMIPS32Cvt_d_s::Opcode = "cvt.d.s"; | 85 template <> const char *InstMIPS32Cvt_d_s::Opcode = "cvt.d.s"; |
| 72 template <> const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w"; | 86 template <> const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w"; |
| 73 template <> const char *InstMIPS32Cvt_s_d::Opcode = "cvt.s.d"; | 87 template <> const char *InstMIPS32Cvt_s_d::Opcode = "cvt.s.d"; |
| 74 template <> const char *InstMIPS32Cvt_s_l::Opcode = "cvt.s.l"; | 88 template <> const char *InstMIPS32Cvt_s_l::Opcode = "cvt.s.l"; |
| 75 template <> const char *InstMIPS32Cvt_s_w::Opcode = "cvt.s.w"; | 89 template <> const char *InstMIPS32Cvt_s_w::Opcode = "cvt.s.w"; |
| 76 template <> const char *InstMIPS32Div::Opcode = "div"; | 90 template <> const char *InstMIPS32Div::Opcode = "div"; |
| 77 template <> const char *InstMIPS32Div_d::Opcode = "div.d"; | 91 template <> const char *InstMIPS32Div_d::Opcode = "div.d"; |
| 78 template <> const char *InstMIPS32Div_s::Opcode = "div.s"; | 92 template <> const char *InstMIPS32Div_s::Opcode = "div.s"; |
| 79 template <> const char *InstMIPS32Divu::Opcode = "divu"; | 93 template <> const char *InstMIPS32Divu::Opcode = "divu"; |
| 80 template <> const char *InstMIPS32La::Opcode = "la"; | 94 template <> const char *InstMIPS32La::Opcode = "la"; |
| 81 template <> const char *InstMIPS32Ldc1::Opcode = "ldc1"; | 95 template <> const char *InstMIPS32Ldc1::Opcode = "ldc1"; |
| 82 template <> const char *InstMIPS32Lui::Opcode = "lui"; | 96 template <> const char *InstMIPS32Lui::Opcode = "lui"; |
| 83 template <> const char *InstMIPS32Lw::Opcode = "lw"; | 97 template <> const char *InstMIPS32Lw::Opcode = "lw"; |
| 84 template <> const char *InstMIPS32Lwc1::Opcode = "lwc1"; | 98 template <> const char *InstMIPS32Lwc1::Opcode = "lwc1"; |
| 85 template <> const char *InstMIPS32Mfc1::Opcode = "mfc1"; | 99 template <> const char *InstMIPS32Mfc1::Opcode = "mfc1"; |
| 86 template <> const char *InstMIPS32Mfhi::Opcode = "mfhi"; | 100 template <> const char *InstMIPS32Mfhi::Opcode = "mfhi"; |
| 87 template <> const char *InstMIPS32Mflo::Opcode = "mflo"; | 101 template <> const char *InstMIPS32Mflo::Opcode = "mflo"; |
| 88 template <> const char *InstMIPS32Mov_d::Opcode = "mov.d"; | 102 template <> const char *InstMIPS32Mov_d::Opcode = "mov.d"; |
| 89 template <> const char *InstMIPS32Mov_s::Opcode = "mov.s"; | 103 template <> const char *InstMIPS32Mov_s::Opcode = "mov.s"; |
| 104 template <> const char *InstMIPS32Movf::Opcode = "movf"; |
| 105 template <> const char *InstMIPS32Movt::Opcode = "movt"; |
| 90 template <> const char *InstMIPS32Mtc1::Opcode = "mtc1"; | 106 template <> const char *InstMIPS32Mtc1::Opcode = "mtc1"; |
| 91 template <> const char *InstMIPS32Mthi::Opcode = "mthi"; | 107 template <> const char *InstMIPS32Mthi::Opcode = "mthi"; |
| 92 template <> const char *InstMIPS32Mtlo::Opcode = "mtlo"; | 108 template <> const char *InstMIPS32Mtlo::Opcode = "mtlo"; |
| 93 template <> const char *InstMIPS32Mul::Opcode = "mul"; | 109 template <> const char *InstMIPS32Mul::Opcode = "mul"; |
| 94 template <> const char *InstMIPS32Mul_d::Opcode = "mul.d"; | 110 template <> const char *InstMIPS32Mul_d::Opcode = "mul.d"; |
| 95 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s"; | 111 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s"; |
| 96 template <> const char *InstMIPS32Mult::Opcode = "mult"; | 112 template <> const char *InstMIPS32Mult::Opcode = "mult"; |
| 97 template <> const char *InstMIPS32Multu::Opcode = "multu"; | 113 template <> const char *InstMIPS32Multu::Opcode = "multu"; |
| 98 template <> const char *InstMIPS32Or::Opcode = "or"; | 114 template <> const char *InstMIPS32Or::Opcode = "or"; |
| 99 template <> const char *InstMIPS32Ori::Opcode = "ori"; | 115 template <> const char *InstMIPS32Ori::Opcode = "ori"; |
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| 833 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const { | 849 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const { |
| 834 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); | 850 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); |
| 835 auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0)); | 851 auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0)); |
| 836 ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset()); | 852 ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset()); |
| 837 uint32_t Imm = static_cast<uint32_t>(Offset->getValue()); | 853 uint32_t Imm = static_cast<uint32_t>(Offset->getValue()); |
| 838 Asm->lw(getDest(), Mem->getBase(), Imm); | 854 Asm->lw(getDest(), Mem->getBase(), Imm); |
| 839 } | 855 } |
| 840 | 856 |
| 841 } // end of namespace MIPS32 | 857 } // end of namespace MIPS32 |
| 842 } // end of namespace Ice | 858 } // end of namespace Ice |
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