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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <stdarg.h> | 5 #include <stdarg.h> |
6 #include <stdlib.h> | 6 #include <stdlib.h> |
7 #include <cmath> | 7 #include <cmath> |
8 | 8 |
9 #if V8_TARGET_ARCH_S390 | 9 #if V8_TARGET_ARCH_S390 |
10 | 10 |
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1741 registers_[3] = 0x50Bad4U; | 1741 registers_[3] = 0x50Bad4U; |
1742 registers_[12] = 0x50Bad4U; | 1742 registers_[12] = 0x50Bad4U; |
1743 #endif | 1743 #endif |
1744 } | 1744 } |
1745 | 1745 |
1746 uint32_t Simulator::ReadWU(intptr_t addr, Instruction* instr) { | 1746 uint32_t Simulator::ReadWU(intptr_t addr, Instruction* instr) { |
1747 uint32_t* ptr = reinterpret_cast<uint32_t*>(addr); | 1747 uint32_t* ptr = reinterpret_cast<uint32_t*>(addr); |
1748 return *ptr; | 1748 return *ptr; |
1749 } | 1749 } |
1750 | 1750 |
| 1751 int64_t Simulator::ReadW64(intptr_t addr, Instruction* instr) { |
| 1752 int64_t* ptr = reinterpret_cast<int64_t*>(addr); |
| 1753 return *ptr; |
| 1754 } |
| 1755 |
1751 int32_t Simulator::ReadW(intptr_t addr, Instruction* instr) { | 1756 int32_t Simulator::ReadW(intptr_t addr, Instruction* instr) { |
1752 int32_t* ptr = reinterpret_cast<int32_t*>(addr); | 1757 int32_t* ptr = reinterpret_cast<int32_t*>(addr); |
1753 return *ptr; | 1758 return *ptr; |
1754 } | 1759 } |
1755 | 1760 |
1756 void Simulator::WriteW(intptr_t addr, uint32_t value, Instruction* instr) { | 1761 void Simulator::WriteW(intptr_t addr, uint32_t value, Instruction* instr) { |
1757 uint32_t* ptr = reinterpret_cast<uint32_t*>(addr); | 1762 uint32_t* ptr = reinterpret_cast<uint32_t*>(addr); |
1758 *ptr = value; | 1763 *ptr = value; |
1759 return; | 1764 return; |
1760 } | 1765 } |
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5506 break; | 5511 break; |
5507 } | 5512 } |
5508 default: | 5513 default: |
5509 UNREACHABLE(); | 5514 UNREACHABLE(); |
5510 return false; | 5515 return false; |
5511 } | 5516 } |
5512 return true; | 5517 return true; |
5513 } | 5518 } |
5514 | 5519 |
5515 int16_t Simulator::ByteReverse(int16_t hword) { | 5520 int16_t Simulator::ByteReverse(int16_t hword) { |
| 5521 #if defined(__GNUC__) |
| 5522 return __builtin_bswap16(hword); |
| 5523 #else |
5516 return (hword << 8) | ((hword >> 8) & 0x00ff); | 5524 return (hword << 8) | ((hword >> 8) & 0x00ff); |
| 5525 #endif |
5517 } | 5526 } |
5518 | 5527 |
5519 int32_t Simulator::ByteReverse(int32_t word) { | 5528 int32_t Simulator::ByteReverse(int32_t word) { |
| 5529 #if defined(__GNUC__) |
| 5530 return __builtin_bswap32(word); |
| 5531 #else |
5520 int32_t result = word << 24; | 5532 int32_t result = word << 24; |
5521 result |= (word << 8) & 0x00ff0000; | 5533 result |= (word << 8) & 0x00ff0000; |
5522 result |= (word >> 8) & 0x0000ff00; | 5534 result |= (word >> 8) & 0x0000ff00; |
5523 result |= (word >> 24) & 0x00000ff; | 5535 result |= (word >> 24) & 0x00000ff; |
5524 return result; | 5536 return result; |
| 5537 #endif |
| 5538 } |
| 5539 |
| 5540 int64_t Simulator::ByteReverse(int64_t dword) { |
| 5541 #if defined(__GNUC__) |
| 5542 return __builtin_bswap64(dword); |
| 5543 #else |
| 5544 #error unsupport __builtin_bswap64 |
| 5545 #endif |
5525 } | 5546 } |
5526 | 5547 |
5527 int Simulator::DecodeInstructionOriginal(Instruction* instr) { | 5548 int Simulator::DecodeInstructionOriginal(Instruction* instr) { |
5528 int instrLength = instr->InstructionLength(); | 5549 int instrLength = instr->InstructionLength(); |
5529 bool processed = true; | 5550 bool processed = true; |
5530 if (instrLength == 2) | 5551 if (instrLength == 2) |
5531 processed = DecodeTwoByte(instr); | 5552 processed = DecodeTwoByte(instr); |
5532 else if (instrLength == 4) | 5553 else if (instrLength == 4) |
5533 processed = DecodeFourByte(instr); | 5554 processed = DecodeFourByte(instr); |
5534 else if (instrLength == 6) | 5555 else if (instrLength == 6) |
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9815 DCHECK(r1 % 2 == 0); | 9836 DCHECK(r1 % 2 == 0); |
9816 | 9837 |
9817 int64_t dividend = get_register(r1 + 1); | 9838 int64_t dividend = get_register(r1 + 1); |
9818 int64_t divisor = get_register(r2); | 9839 int64_t divisor = get_register(r2); |
9819 set_register(r1, dividend % divisor); | 9840 set_register(r1, dividend % divisor); |
9820 set_register(r1 + 1, dividend / divisor); | 9841 set_register(r1 + 1, dividend / divisor); |
9821 return length; | 9842 return length; |
9822 } | 9843 } |
9823 | 9844 |
9824 EVALUATE(LRVGR) { | 9845 EVALUATE(LRVGR) { |
9825 UNIMPLEMENTED(); | 9846 DCHECK_OPCODE(LRVGR); |
9826 USE(instr); | 9847 DECODE_RRE_INSTRUCTION(r1, r2); |
9827 return 0; | 9848 int64_t r2_val = get_register(r2); |
| 9849 int64_t r1_val = ByteReverse(r2_val); |
| 9850 |
| 9851 set_register(r1, r1_val); |
| 9852 return length; |
9828 } | 9853 } |
9829 | 9854 |
9830 EVALUATE(LPGFR) { | 9855 EVALUATE(LPGFR) { |
9831 UNIMPLEMENTED(); | 9856 UNIMPLEMENTED(); |
9832 USE(instr); | 9857 USE(instr); |
9833 return 0; | 9858 return 0; |
9834 } | 9859 } |
9835 | 9860 |
9836 EVALUATE(LNGFR) { | 9861 EVALUATE(LNGFR) { |
9837 UNIMPLEMENTED(); | 9862 UNIMPLEMENTED(); |
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9930 return 0; | 9955 return 0; |
9931 } | 9956 } |
9932 | 9957 |
9933 EVALUATE(KMAC) { | 9958 EVALUATE(KMAC) { |
9934 UNIMPLEMENTED(); | 9959 UNIMPLEMENTED(); |
9935 USE(instr); | 9960 USE(instr); |
9936 return 0; | 9961 return 0; |
9937 } | 9962 } |
9938 | 9963 |
9939 EVALUATE(LRVR) { | 9964 EVALUATE(LRVR) { |
9940 UNIMPLEMENTED(); | 9965 DCHECK_OPCODE(LRVR); |
9941 USE(instr); | 9966 DECODE_RRE_INSTRUCTION(r1, r2); |
9942 return 0; | 9967 int32_t r2_val = get_low_register<int32_t>(r2); |
| 9968 int32_t r1_val = ByteReverse(r2_val); |
| 9969 |
| 9970 set_low_register(r1, r1_val); |
| 9971 return length; |
9943 } | 9972 } |
9944 | 9973 |
9945 EVALUATE(CGR) { | 9974 EVALUATE(CGR) { |
9946 DCHECK_OPCODE(CGR); | 9975 DCHECK_OPCODE(CGR); |
9947 DECODE_RRE_INSTRUCTION(r1, r2); | 9976 DECODE_RRE_INSTRUCTION(r1, r2); |
9948 // Compare (64) | 9977 // Compare (64) |
9949 int64_t r1_val = get_register(r1); | 9978 int64_t r1_val = get_register(r1); |
9950 int64_t r2_val = get_register(r2); | 9979 int64_t r2_val = get_register(r2); |
9951 SetS390ConditionCode<int64_t>(r1_val, r2_val); | 9980 SetS390ConditionCode<int64_t>(r1_val, r2_val); |
9952 return length; | 9981 return length; |
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10731 USE(instr); | 10760 USE(instr); |
10732 return 0; | 10761 return 0; |
10733 } | 10762 } |
10734 | 10763 |
10735 EVALUATE(CVBG) { | 10764 EVALUATE(CVBG) { |
10736 UNIMPLEMENTED(); | 10765 UNIMPLEMENTED(); |
10737 USE(instr); | 10766 USE(instr); |
10738 return 0; | 10767 return 0; |
10739 } | 10768 } |
10740 | 10769 |
10741 EVALUATE(LRVG) { | |
10742 UNIMPLEMENTED(); | |
10743 USE(instr); | |
10744 return 0; | |
10745 } | |
10746 | |
10747 EVALUATE(LT) { | 10770 EVALUATE(LT) { |
10748 DCHECK_OPCODE(LT); | 10771 DCHECK_OPCODE(LT); |
10749 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); | 10772 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); |
10750 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); | 10773 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); |
10751 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); | 10774 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); |
10752 intptr_t addr = x2_val + b2_val + d2; | 10775 intptr_t addr = x2_val + b2_val + d2; |
10753 int32_t value = ReadW(addr, instr); | 10776 int32_t value = ReadW(addr, instr); |
10754 set_low_register(r1, value); | 10777 set_low_register(r1, value); |
10755 SetS390ConditionCode<int32_t>(value, 0); | 10778 SetS390ConditionCode<int32_t>(value, 0); |
10756 return length; | 10779 return length; |
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10833 USE(instr); | 10856 USE(instr); |
10834 return 0; | 10857 return 0; |
10835 } | 10858 } |
10836 | 10859 |
10837 EVALUATE(DSGF) { | 10860 EVALUATE(DSGF) { |
10838 UNIMPLEMENTED(); | 10861 UNIMPLEMENTED(); |
10839 USE(instr); | 10862 USE(instr); |
10840 return 0; | 10863 return 0; |
10841 } | 10864 } |
10842 | 10865 |
| 10866 EVALUATE(LRVG) { |
| 10867 DCHECK_OPCODE(LRVG); |
| 10868 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); |
| 10869 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); |
| 10870 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); |
| 10871 intptr_t mem_addr = b2_val + x2_val + d2; |
| 10872 int64_t mem_val = ReadW64(mem_addr, instr); |
| 10873 set_register(r1, ByteReverse(mem_val)); |
| 10874 return length; |
| 10875 } |
| 10876 |
10843 EVALUATE(LRV) { | 10877 EVALUATE(LRV) { |
10844 DCHECK_OPCODE(LRV); | 10878 DCHECK_OPCODE(LRV); |
10845 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); | 10879 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); |
10846 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); | 10880 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); |
10847 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); | 10881 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); |
10848 intptr_t mem_addr = b2_val + x2_val + d2; | 10882 intptr_t mem_addr = b2_val + x2_val + d2; |
10849 int32_t mem_val = ReadW(mem_addr, instr); | 10883 int32_t mem_val = ReadW(mem_addr, instr); |
10850 set_low_register(r1, ByteReverse(mem_val)); | 10884 set_low_register(r1, ByteReverse(mem_val)); |
10851 return length; | 10885 return length; |
10852 } | 10886 } |
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10900 USE(instr); | 10934 USE(instr); |
10901 return 0; | 10935 return 0; |
10902 } | 10936 } |
10903 | 10937 |
10904 EVALUATE(CVDG) { | 10938 EVALUATE(CVDG) { |
10905 UNIMPLEMENTED(); | 10939 UNIMPLEMENTED(); |
10906 USE(instr); | 10940 USE(instr); |
10907 return 0; | 10941 return 0; |
10908 } | 10942 } |
10909 | 10943 |
10910 EVALUATE(STRVG) { | |
10911 UNIMPLEMENTED(); | |
10912 USE(instr); | |
10913 return 0; | |
10914 } | |
10915 | |
10916 EVALUATE(CGF) { | 10944 EVALUATE(CGF) { |
10917 UNIMPLEMENTED(); | 10945 UNIMPLEMENTED(); |
10918 USE(instr); | 10946 USE(instr); |
10919 return 0; | 10947 return 0; |
10920 } | 10948 } |
10921 | 10949 |
10922 EVALUATE(CLGF) { | 10950 EVALUATE(CLGF) { |
10923 UNIMPLEMENTED(); | 10951 UNIMPLEMENTED(); |
10924 USE(instr); | 10952 USE(instr); |
10925 return 0; | 10953 return 0; |
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10947 DCHECK_OPCODE(STRV); | 10975 DCHECK_OPCODE(STRV); |
10948 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); | 10976 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); |
10949 int32_t r1_val = get_low_register<int32_t>(r1); | 10977 int32_t r1_val = get_low_register<int32_t>(r1); |
10950 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); | 10978 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); |
10951 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); | 10979 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); |
10952 intptr_t mem_addr = b2_val + x2_val + d2; | 10980 intptr_t mem_addr = b2_val + x2_val + d2; |
10953 WriteW(mem_addr, ByteReverse(r1_val), instr); | 10981 WriteW(mem_addr, ByteReverse(r1_val), instr); |
10954 return length; | 10982 return length; |
10955 } | 10983 } |
10956 | 10984 |
| 10985 EVALUATE(STRVG) { |
| 10986 DCHECK_OPCODE(STRVG); |
| 10987 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); |
| 10988 int64_t r1_val = get_register(r1); |
| 10989 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); |
| 10990 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); |
| 10991 intptr_t mem_addr = b2_val + x2_val + d2; |
| 10992 WriteDW(mem_addr, ByteReverse(r1_val)); |
| 10993 return length; |
| 10994 } |
| 10995 |
10957 EVALUATE(STRVH) { | 10996 EVALUATE(STRVH) { |
10958 DCHECK_OPCODE(STRVH); | 10997 DCHECK_OPCODE(STRVH); |
10959 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); | 10998 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); |
10960 int32_t r1_val = get_low_register<int32_t>(r1); | 10999 int32_t r1_val = get_low_register<int32_t>(r1); |
10961 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); | 11000 int64_t x2_val = (x2 == 0) ? 0 : get_register(x2); |
10962 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); | 11001 int64_t b2_val = (b2 == 0) ? 0 : get_register(b2); |
10963 intptr_t mem_addr = b2_val + x2_val + d2; | 11002 intptr_t mem_addr = b2_val + x2_val + d2; |
10964 int16_t result = static_cast<int16_t>(r1_val >> 16); | 11003 int16_t result = static_cast<int16_t>(r1_val >> 16); |
10965 WriteH(mem_addr, ByteReverse(result), instr); | 11004 WriteH(mem_addr, ByteReverse(result), instr); |
10966 return length; | 11005 return length; |
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12520 return 0; | 12559 return 0; |
12521 } | 12560 } |
12522 | 12561 |
12523 #undef EVALUATE | 12562 #undef EVALUATE |
12524 | 12563 |
12525 } // namespace internal | 12564 } // namespace internal |
12526 } // namespace v8 | 12565 } // namespace v8 |
12527 | 12566 |
12528 #endif // USE_SIMULATOR | 12567 #endif // USE_SIMULATOR |
12529 #endif // V8_TARGET_ARCH_S390 | 12568 #endif // V8_TARGET_ARCH_S390 |
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