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Unified Diff: runtime/vm/assembler_mips_test.cc

Issue 20369003: Implements far branch targets for MIPS. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 5 months ago
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Index: runtime/vm/assembler_mips_test.cc
===================================================================
--- runtime/vm/assembler_mips_test.cc (revision 25539)
+++ runtime/vm/assembler_mips_test.cc (working copy)
@@ -53,9 +53,9 @@
ASSEMBLER_TEST_GENERATE(Addu, assembler) {
- __ addiu(R2, ZR, Immediate(21));
- __ addiu(R3, ZR, Immediate(21));
- __ addu(V0, R2, R3);
+ __ addiu(T2, ZR, Immediate(21));
+ __ addiu(T3, ZR, Immediate(21));
+ __ addu(V0, T2, T3);
__ jr(RA);
}
@@ -67,9 +67,9 @@
ASSEMBLER_TEST_GENERATE(Addu_overflow, assembler) {
- __ LoadImmediate(R2, 0x7fffffff);
- __ addiu(R3, R0, Immediate(1));
- __ addu(V0, R2, R3);
+ __ LoadImmediate(T2, 0x7fffffff);
+ __ addiu(T3, R0, Immediate(1));
+ __ addu(V0, T2, T3);
__ jr(RA);
}
@@ -82,9 +82,9 @@
ASSEMBLER_TEST_GENERATE(And, assembler) {
- __ addiu(R2, ZR, Immediate(42));
- __ addiu(R3, ZR, Immediate(2));
- __ and_(V0, R2, R3);
+ __ addiu(T2, ZR, Immediate(42));
+ __ addiu(T3, ZR, Immediate(2));
+ __ and_(V0, T2, T3);
__ jr(RA);
}
@@ -96,8 +96,8 @@
ASSEMBLER_TEST_GENERATE(Andi, assembler) {
- __ addiu(R1, ZR, Immediate(42));
- __ andi(V0, R1, Immediate(2));
+ __ addiu(T1, ZR, Immediate(42));
+ __ andi(V0, T1, Immediate(2));
__ jr(RA);
}
@@ -109,8 +109,8 @@
ASSEMBLER_TEST_GENERATE(Clo, assembler) {
- __ addiu(R1, ZR, Immediate(-1));
- __ clo(V0, R1);
+ __ addiu(T1, ZR, Immediate(-1));
+ __ clo(V0, T1);
__ jr(RA);
}
@@ -122,8 +122,8 @@
ASSEMBLER_TEST_GENERATE(Clz, assembler) {
- __ addiu(R1, ZR, Immediate(0x7fff));
- __ clz(V0, R1);
+ __ addiu(T1, ZR, Immediate(0x7fff));
+ __ clz(V0, T1);
__ jr(RA);
}
@@ -163,9 +163,9 @@
ASSEMBLER_TEST_GENERATE(Divu, assembler) {
- __ addiu(R1, ZR, Immediate(27));
- __ addiu(R2, ZR, Immediate(9));
- __ divu(R1, R2);
+ __ addiu(T1, ZR, Immediate(27));
+ __ addiu(T2, ZR, Immediate(9));
+ __ divu(T1, T2);
__ mflo(V0);
__ jr(RA);
}
@@ -178,9 +178,9 @@
ASSEMBLER_TEST_GENERATE(Div, assembler) {
- __ addiu(R1, ZR, Immediate(27));
- __ addiu(R2, ZR, Immediate(9));
- __ div(R1, R2);
+ __ addiu(T1, ZR, Immediate(27));
+ __ addiu(T2, ZR, Immediate(9));
+ __ div(T1, T2);
__ mflo(V0);
__ jr(RA);
}
@@ -193,9 +193,9 @@
ASSEMBLER_TEST_GENERATE(Divu_corner, assembler) {
- __ LoadImmediate(R1, 0x80000000);
- __ LoadImmediate(R2, 0xffffffff);
- __ divu(R1, R2);
+ __ LoadImmediate(T1, 0x80000000);
+ __ LoadImmediate(T2, 0xffffffff);
+ __ divu(T1, T2);
__ mflo(V0);
__ jr(RA);
}
@@ -208,9 +208,9 @@
ASSEMBLER_TEST_GENERATE(Div_corner, assembler) {
- __ LoadImmediate(R1, 0x80000000);
- __ LoadImmediate(R2, 0xffffffff);
- __ div(R1, R2);
+ __ LoadImmediate(T1, 0x80000000);
+ __ LoadImmediate(T2, 0xffffffff);
+ __ div(T1, T2);
__ mflo(V0);
__ jr(RA);
}
@@ -225,8 +225,8 @@
ASSEMBLER_TEST_GENERATE(Lb, assembler) {
__ addiu(SP, SP, Immediate(-kWordSize * 30));
- __ LoadImmediate(R1, 0xff);
- __ sb(R1, Address(SP));
+ __ LoadImmediate(T1, 0xff);
+ __ sb(T1, Address(SP));
__ lb(V0, Address(SP));
__ addiu(SP, SP, Immediate(kWordSize * 30));
__ jr(RA);
@@ -241,8 +241,8 @@
ASSEMBLER_TEST_GENERATE(Lb_offset, assembler) {
__ addiu(SP, SP, Immediate(-kWordSize * 30));
- __ LoadImmediate(R1, 0xff);
- __ sb(R1, Address(SP, 1));
+ __ LoadImmediate(T1, 0xff);
+ __ sb(T1, Address(SP, 1));
__ lb(V0, Address(SP, 1));
__ addiu(SP, SP, Immediate(kWordSize * 30));
__ jr(RA);
@@ -257,8 +257,8 @@
ASSEMBLER_TEST_GENERATE(Lbu, assembler) {
__ addiu(SP, SP, Immediate(-kWordSize * 30));
- __ LoadImmediate(R1, 0xff);
- __ sb(R1, Address(SP));
+ __ LoadImmediate(T1, 0xff);
+ __ sb(T1, Address(SP));
__ lbu(V0, Address(SP));
__ addiu(SP, SP, Immediate(kWordSize * 30));
__ jr(RA);
@@ -273,8 +273,8 @@
ASSEMBLER_TEST_GENERATE(Lh, assembler) {
__ addiu(SP, SP, Immediate(-kWordSize * 30));
- __ LoadImmediate(R1, 0xffff);
- __ sh(R1, Address(SP));
+ __ LoadImmediate(T1, 0xffff);
+ __ sh(T1, Address(SP));
__ lh(V0, Address(SP));
__ addiu(SP, SP, Immediate(kWordSize * 30));
__ jr(RA);
@@ -289,8 +289,8 @@
ASSEMBLER_TEST_GENERATE(Lhu, assembler) {
__ addiu(SP, SP, Immediate(-kWordSize * 30));
- __ LoadImmediate(R1, 0xffff);
- __ sh(R1, Address(SP));
+ __ LoadImmediate(T1, 0xffff);
+ __ sh(T1, Address(SP));
__ lhu(V0, Address(SP));
__ addiu(SP, SP, Immediate(kWordSize * 30));
__ jr(RA);
@@ -305,8 +305,8 @@
ASSEMBLER_TEST_GENERATE(Lw, assembler) {
__ addiu(SP, SP, Immediate(-kWordSize * 30));
- __ LoadImmediate(R1, -1);
- __ sw(R1, Address(SP));
+ __ LoadImmediate(T1, -1);
+ __ sw(T1, Address(SP));
__ lw(V0, Address(SP));
__ addiu(SP, SP, Immediate(kWordSize * 30));
__ jr(RA);
@@ -332,8 +332,8 @@
ASSEMBLER_TEST_GENERATE(Sll, assembler) {
- __ LoadImmediate(R1, 21);
- __ sll(V0, R1, 1);
+ __ LoadImmediate(T1, 21);
+ __ sll(V0, T1, 1);
__ jr(RA);
}
@@ -345,8 +345,8 @@
ASSEMBLER_TEST_GENERATE(Srl, assembler) {
- __ LoadImmediate(R1, 84);
- __ srl(V0, R1, 1);
+ __ LoadImmediate(T1, 84);
+ __ srl(V0, T1, 1);
__ jr(RA);
}
@@ -358,9 +358,9 @@
ASSEMBLER_TEST_GENERATE(LShifting, assembler) {
- __ LoadImmediate(R1, 1);
- __ sll(R1, R1, 31);
- __ srl(V0, R1, 31);
+ __ LoadImmediate(T1, 1);
+ __ sll(T1, T1, 31);
+ __ srl(V0, T1, 31);
__ jr(RA);
}
@@ -372,9 +372,9 @@
ASSEMBLER_TEST_GENERATE(RShifting, assembler) {
- __ LoadImmediate(R1, 1);
- __ sll(R1, R1, 31);
- __ sra(V0, R1, 31);
+ __ LoadImmediate(T1, 1);
+ __ sll(T1, T1, 31);
+ __ sra(V0, T1, 31);
__ jr(RA);
}
@@ -386,9 +386,9 @@
ASSEMBLER_TEST_GENERATE(Sllv, assembler) {
- __ LoadImmediate(R1, 21);
- __ LoadImmediate(R2, 1);
- __ sllv(V0, R1, R2);
+ __ LoadImmediate(T1, 21);
+ __ LoadImmediate(T2, 1);
+ __ sllv(V0, T1, T2);
__ jr(RA);
}
@@ -400,9 +400,9 @@
ASSEMBLER_TEST_GENERATE(Srlv, assembler) {
- __ LoadImmediate(R1, 84);
- __ LoadImmediate(R2, 1);
- __ srlv(V0, R1, R2);
+ __ LoadImmediate(T1, 84);
+ __ LoadImmediate(T2, 1);
+ __ srlv(V0, T1, T2);
__ jr(RA);
}
@@ -414,10 +414,10 @@
ASSEMBLER_TEST_GENERATE(LShiftingV, assembler) {
- __ LoadImmediate(R1, 1);
- __ LoadImmediate(R2, 31);
- __ sllv(R1, R1, R2);
- __ srlv(V0, R1, R2);
+ __ LoadImmediate(T1, 1);
+ __ LoadImmediate(T2, 31);
+ __ sllv(T1, T1, T2);
+ __ srlv(V0, T1, T2);
__ jr(RA);
}
@@ -429,10 +429,10 @@
ASSEMBLER_TEST_GENERATE(RShiftingV, assembler) {
- __ LoadImmediate(R1, 1);
- __ LoadImmediate(R2, 31);
- __ sllv(R1, R1, R2);
- __ srav(V0, R1, R2);
+ __ LoadImmediate(T1, 1);
+ __ LoadImmediate(T2, 31);
+ __ sllv(T1, T1, T2);
+ __ srav(V0, T1, T2);
__ jr(RA);
}
@@ -444,9 +444,9 @@
ASSEMBLER_TEST_GENERATE(Mult_pos, assembler) {
- __ LoadImmediate(R1, 6);
- __ LoadImmediate(R2, 7);
- __ mult(R1, R2);
+ __ LoadImmediate(T1, 6);
+ __ LoadImmediate(T2, 7);
+ __ mult(T1, T2);
__ mflo(V0);
__ jr(RA);
}
@@ -459,9 +459,9 @@
ASSEMBLER_TEST_GENERATE(Mult_neg, assembler) {
- __ LoadImmediate(R1, -6);
- __ LoadImmediate(R2, 7);
- __ mult(R1, R2);
+ __ LoadImmediate(T1, -6);
+ __ LoadImmediate(T2, 7);
+ __ mult(T1, T2);
__ mflo(V0);
__ jr(RA);
}
@@ -474,9 +474,9 @@
ASSEMBLER_TEST_GENERATE(Mult_neg_hi, assembler) {
- __ LoadImmediate(R1, -6);
- __ LoadImmediate(R2, 7);
- __ mult(R1, R2);
+ __ LoadImmediate(T1, -6);
+ __ LoadImmediate(T2, 7);
+ __ mult(T1, T2);
__ mfhi(V0);
__ jr(RA);
}
@@ -489,9 +489,9 @@
ASSEMBLER_TEST_GENERATE(Multu_lo, assembler) {
- __ LoadImmediate(R1, 6);
- __ LoadImmediate(R2, 7);
- __ multu(R1, R2);
+ __ LoadImmediate(T1, 6);
+ __ LoadImmediate(T2, 7);
+ __ multu(T1, T2);
__ mflo(V0);
__ jr(RA);
}
@@ -504,9 +504,9 @@
ASSEMBLER_TEST_GENERATE(Multu_hi, assembler) {
- __ LoadImmediate(R1, 65536);
- __ LoadImmediate(R2, 65536);
- __ multu(R1, R2);
+ __ LoadImmediate(T1, 65536);
+ __ LoadImmediate(T2, 65536);
+ __ multu(T1, T2);
__ mfhi(V0);
__ jr(RA);
}
@@ -519,10 +519,10 @@
ASSEMBLER_TEST_GENERATE(Madd_neg, assembler) {
- __ LoadImmediate(R1, -6);
- __ LoadImmediate(R2, 7);
- __ mult(R1, R2);
- __ madd(R1, R2);
+ __ LoadImmediate(T1, -6);
+ __ LoadImmediate(T2, 7);
+ __ mult(T1, T2);
+ __ madd(T1, T2);
__ mflo(V0);
__ mfhi(V1);
__ jr(RA);
@@ -536,9 +536,9 @@
ASSEMBLER_TEST_GENERATE(Subu, assembler) {
- __ LoadImmediate(R1, 737);
- __ LoadImmediate(R2, 695);
- __ subu(V0, R1, R2);
+ __ LoadImmediate(T1, 737);
+ __ LoadImmediate(T2, 695);
+ __ subu(V0, T1, T2);
__ jr(RA);
}
@@ -550,9 +550,9 @@
ASSEMBLER_TEST_GENERATE(Or, assembler) {
- __ LoadImmediate(R1, 34);
- __ LoadImmediate(R2, 8);
- __ or_(V0, R1, R2);
+ __ LoadImmediate(T1, 34);
+ __ LoadImmediate(T2, 8);
+ __ or_(V0, T1, T2);
__ jr(RA);
}
@@ -564,9 +564,9 @@
ASSEMBLER_TEST_GENERATE(Nor, assembler) {
- __ LoadImmediate(R1, -47);
- __ LoadImmediate(R2, -60);
- __ nor(V0, R1, R2);
+ __ LoadImmediate(T1, -47);
+ __ LoadImmediate(T2, -60);
+ __ nor(V0, T1, T2);
__ jr(RA);
}
@@ -578,9 +578,9 @@
ASSEMBLER_TEST_GENERATE(Xor, assembler) {
- __ LoadImmediate(R1, 51);
- __ LoadImmediate(R2, 25);
- __ xor_(V0, R1, R2);
+ __ LoadImmediate(T1, 51);
+ __ LoadImmediate(T2, 25);
+ __ xor_(V0, T1, T2);
__ jr(RA);
}
@@ -605,9 +605,9 @@
ASSEMBLER_TEST_GENERATE(Slt, assembler) {
- __ LoadImmediate(R1, -1);
- __ LoadImmediate(R2, 0);
- __ slt(V0, R1, R2);
+ __ LoadImmediate(T1, -1);
+ __ LoadImmediate(T2, 0);
+ __ slt(V0, T1, T2);
__ jr(RA);
}
@@ -619,9 +619,9 @@
ASSEMBLER_TEST_GENERATE(Sltu, assembler) {
- __ LoadImmediate(R1, -1);
- __ LoadImmediate(R2, 0);
- __ sltu(V0, R1, R2);
+ __ LoadImmediate(T1, -1);
+ __ LoadImmediate(T2, 0);
+ __ sltu(V0, T1, T2);
__ jr(RA);
}
@@ -633,10 +633,10 @@
ASSEMBLER_TEST_GENERATE(Movz, assembler) {
- __ LoadImmediate(R1, 42);
- __ LoadImmediate(R2, 23);
- __ slt(R3, R1, R2);
- __ movz(V0, R1, R3);
+ __ LoadImmediate(T1, 42);
+ __ LoadImmediate(T2, 23);
+ __ slt(T3, T1, T2);
+ __ movz(V0, T1, T3);
__ jr(RA);
}
@@ -648,10 +648,10 @@
ASSEMBLER_TEST_GENERATE(Movn, assembler) {
- __ LoadImmediate(R1, 42);
- __ LoadImmediate(R2, 23);
- __ slt(R3, R2, R1);
- __ movn(V0, R1, R3);
+ __ LoadImmediate(T1, 42);
+ __ LoadImmediate(T2, 23);
+ __ slt(T3, T2, T1);
+ __ movn(V0, T1, T3);
__ jr(RA);
}
@@ -677,12 +677,12 @@
ASSEMBLER_TEST_GENERATE(Beq_backward, assembler) {
Label l;
- __ LoadImmediate(R1, 0);
- __ LoadImmediate(R2, 1);
+ __ LoadImmediate(T1, 0);
+ __ LoadImmediate(T2, 1);
__ Bind(&l);
- __ addiu(R1, R1, Immediate(1));
- __ beq(R1, R2, &l);
- __ ori(V0, R1, Immediate(0));
+ __ addiu(T1, T1, Immediate(1));
+ __ beq(T1, T2, &l);
+ __ ori(V0, T1, Immediate(0));
__ jr(RA);
}
@@ -696,13 +696,13 @@
ASSEMBLER_TEST_GENERATE(Beq_backward_delay, assembler) {
Label l;
- __ LoadImmediate(R1, 0);
- __ LoadImmediate(R2, 1);
+ __ LoadImmediate(T1, 0);
+ __ LoadImmediate(T2, 1);
__ Bind(&l);
- __ addiu(R1, R1, Immediate(1));
- __ beq(R1, R2, &l);
- __ delay_slot()->addiu(R1, R1, Immediate(1));
- __ ori(V0, R1, Immediate(0));
+ __ addiu(T1, T1, Immediate(1));
+ __ beq(T1, T2, &l);
+ __ delay_slot()->addiu(T1, T1, Immediate(1));
+ __ ori(V0, T1, Immediate(0));
__ jr(RA);
}
@@ -716,11 +716,11 @@
ASSEMBLER_TEST_GENERATE(Beq_forward_taken, assembler) {
Label l;
- __ LoadImmediate(R5, 1);
- __ LoadImmediate(R6, 1);
+ __ LoadImmediate(T5, 1);
+ __ LoadImmediate(T6, 1);
__ LoadImmediate(V0, 42);
- __ beq(R5, R6, &l);
+ __ beq(T5, T6, &l);
__ LoadImmediate(V0, 0);
__ Bind(&l);
__ jr(RA);
@@ -736,11 +736,11 @@
ASSEMBLER_TEST_GENERATE(Beq_forward_not_taken, assembler) {
Label l;
- __ LoadImmediate(R5, 0);
- __ LoadImmediate(R6, 1);
+ __ LoadImmediate(T5, 0);
+ __ LoadImmediate(T6, 1);
__ LoadImmediate(V0, 42);
- __ beq(R5, R6, &l);
+ __ beq(T5, T6, &l);
__ LoadImmediate(V0, 0);
__ Bind(&l);
__ jr(RA);
@@ -756,11 +756,11 @@
ASSEMBLER_TEST_GENERATE(Beq_forward_taken2, assembler) {
Label l;
- __ LoadImmediate(R5, 1);
- __ LoadImmediate(R6, 1);
+ __ LoadImmediate(T5, 1);
+ __ LoadImmediate(T6, 1);
__ LoadImmediate(V0, 42);
- __ beq(R5, R6, &l);
+ __ beq(T5, T6, &l);
__ nop();
__ nop();
__ LoadImmediate(V0, 0);
@@ -778,11 +778,11 @@
ASSEMBLER_TEST_GENERATE(Beq_forward_taken_delay, assembler) {
Label l;
- __ LoadImmediate(R5, 1);
- __ LoadImmediate(R6, 1);
+ __ LoadImmediate(T5, 1);
+ __ LoadImmediate(T6, 1);
__ LoadImmediate(V0, 42);
- __ beq(R5, R6, &l);
+ __ beq(T5, T6, &l);
__ delay_slot()->ori(V0, V0, Immediate(1));
__ LoadImmediate(V0, 0);
__ Bind(&l);
@@ -799,11 +799,11 @@
ASSEMBLER_TEST_GENERATE(Beq_forward_not_taken_delay, assembler) {
Label l;
- __ LoadImmediate(R5, 0);
- __ LoadImmediate(R6, 1);
+ __ LoadImmediate(T5, 0);
+ __ LoadImmediate(T6, 1);
__ LoadImmediate(V0, 42);
- __ beq(R5, R6, &l);
+ __ beq(T5, T6, &l);
__ delay_slot()->ori(V0, V0, Immediate(1));
__ addiu(V0, V0, Immediate(1));
__ Bind(&l);
@@ -820,13 +820,13 @@
ASSEMBLER_TEST_GENERATE(Beql_backward_delay, assembler) {
Label l;
- __ LoadImmediate(R5, 0);
- __ LoadImmediate(R6, 1);
+ __ LoadImmediate(T5, 0);
+ __ LoadImmediate(T6, 1);
__ Bind(&l);
- __ addiu(R5, R5, Immediate(1));
- __ beql(R5, R6, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(1));
- __ ori(V0, R5, Immediate(0));
+ __ addiu(T5, T5, Immediate(1));
+ __ beql(T5, T6, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -840,11 +840,11 @@
ASSEMBLER_TEST_GENERATE(Bgez, assembler) {
Label l;
- __ LoadImmediate(R5, 3);
+ __ LoadImmediate(T5, 3);
__ Bind(&l);
- __ bgez(R5, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(-1));
- __ ori(V0, R5, Immediate(0));
+ __ bgez(T5, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(-1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -858,11 +858,11 @@
ASSEMBLER_TEST_GENERATE(Bgezl, assembler) {
Label l;
- __ LoadImmediate(R5, 3);
+ __ LoadImmediate(T5, 3);
__ Bind(&l);
- __ bgezl(R5, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(-1));
- __ ori(V0, R5, Immediate(0));
+ __ bgezl(T5, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(-1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -876,11 +876,11 @@
ASSEMBLER_TEST_GENERATE(Blez, assembler) {
Label l;
- __ LoadImmediate(R5, -3);
+ __ LoadImmediate(T5, -3);
__ Bind(&l);
- __ blez(R5, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(1));
- __ ori(V0, R5, Immediate(0));
+ __ blez(T5, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -894,11 +894,11 @@
ASSEMBLER_TEST_GENERATE(Blezl, assembler) {
Label l;
- __ LoadImmediate(R5, -3);
+ __ LoadImmediate(T5, -3);
__ Bind(&l);
- __ blezl(R5, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(1));
- __ ori(V0, R5, Immediate(0));
+ __ blezl(T5, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -912,11 +912,11 @@
ASSEMBLER_TEST_GENERATE(Bgtz, assembler) {
Label l;
- __ LoadImmediate(R5, 3);
+ __ LoadImmediate(T5, 3);
__ Bind(&l);
- __ bgtz(R5, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(-1));
- __ ori(V0, R5, Immediate(0));
+ __ bgtz(T5, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(-1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -930,11 +930,11 @@
ASSEMBLER_TEST_GENERATE(Bgtzl, assembler) {
Label l;
- __ LoadImmediate(R5, 3);
+ __ LoadImmediate(T5, 3);
__ Bind(&l);
- __ bgtzl(R5, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(-1));
- __ ori(V0, R5, Immediate(0));
+ __ bgtzl(T5, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(-1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -948,11 +948,11 @@
ASSEMBLER_TEST_GENERATE(Bltz, assembler) {
Label l;
- __ LoadImmediate(R5, -3);
+ __ LoadImmediate(T5, -3);
__ Bind(&l);
- __ bltz(R5, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(1));
- __ ori(V0, R5, Immediate(0));
+ __ bltz(T5, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -966,11 +966,11 @@
ASSEMBLER_TEST_GENERATE(Bltzl, assembler) {
Label l;
- __ LoadImmediate(R5, -3);
+ __ LoadImmediate(T5, -3);
__ Bind(&l);
- __ bltzl(R5, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(1));
- __ ori(V0, R5, Immediate(0));
+ __ bltzl(T5, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -984,11 +984,11 @@
ASSEMBLER_TEST_GENERATE(Bne, assembler) {
Label l;
- __ LoadImmediate(R5, 3);
+ __ LoadImmediate(T5, 3);
__ Bind(&l);
- __ bne(R5, R0, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(-1));
- __ ori(V0, R5, Immediate(0));
+ __ bne(T5, R0, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(-1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -1002,11 +1002,11 @@
ASSEMBLER_TEST_GENERATE(Bnel, assembler) {
Label l;
- __ LoadImmediate(R5, 3);
+ __ LoadImmediate(T5, 3);
__ Bind(&l);
- __ bnel(R5, R0, &l);
- __ delay_slot()->addiu(R5, R5, Immediate(-1));
- __ ori(V0, R5, Immediate(0));
+ __ bnel(T5, R0, &l);
+ __ delay_slot()->addiu(T5, T5, Immediate(-1));
+ __ ori(V0, T5, Immediate(0));
__ jr(RA);
}
@@ -1058,8 +1058,8 @@
ASSEMBLER_TEST_GENERATE(Jalr_delay, assembler) {
- __ mov(R2, RA);
- __ jalr(R2, RA);
+ __ mov(T2, RA);
+ __ jalr(T2, RA);
__ delay_slot()->ori(V0, ZR, Immediate(42));
}
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