Implements far branch targets for MIPS.

runtime/vm/stub_code_mips.cc

Index: runtime/vm/stub_code_mips.cc
===================================================================
--- runtime/vm/stub_code_mips.cc	(revision 25483)
+++ runtime/vm/stub_code_mips.cc	(working copy)
@@ -300,12 +300,12 @@
   __ delay_slot()->addiu(T2, V0,
                          Immediate(Array::data_offset() - kHeapObjectTag));
   __ Bind(&loop);
-  __ lw(TMP, Address(T1));
+  __ lw(T3, Address(T1));
   __ addiu(A1, A1, Immediate(-Smi::RawValue(1)));
   __ addiu(T1, T1, Immediate(-kWordSize));
   __ addiu(T2, T2, Immediate(kWordSize));
   __ bgez(A1, &loop);
-  __ delay_slot()->sw(TMP, Address(T2, -kWordSize));
+  __ delay_slot()->sw(T3, Address(T2, -kWordSize));
   __ Bind(&loop_exit);
 }
 
@@ -589,8 +589,8 @@
     // T0: points to new space object.
     // T2: potential next object start.
     // T3: array size.
-    __ lw(TMP1, Address(T0, Scavenger::end_offset()));
-    __ BranchUnsignedGreaterEqual(T2, TMP1, &slow_case);
+    __ lw(CMPRES1, Address(T0, Scavenger::end_offset()));
+    __ BranchUnsignedGreaterEqual(T2, CMPRES1, &slow_case);
 
     // Successfully allocated the object(s), now update top to point to
     // next object start and initialize the object.
@@ -953,11 +953,11 @@
     // T2: object size.
     // T3: potential next object start.
     __ LoadImmediate(TMP1, heap->EndAddress());
-    __ lw(TMP1, Address(TMP1, 0));
+    __ lw(CMPRES1, Address(TMP1, 0));
     if (FLAG_use_slow_path) {
       __ b(&slow_case);
     } else {
-      __ BranchUnsignedGreaterEqual(T3, TMP1, &slow_case);
+      __ BranchUnsignedGreaterEqual(T3, CMPRES1, &slow_case);
     }
 
     // Successfully allocated the object, now update top to point to
@@ -1012,9 +1012,9 @@
     __ sll(T1, T1, 2);
     __ Bind(&loop);
     __ addiu(T1, T1, Immediate(-kWordSize));
-    __ addu(TMP1, T3, T1);
+    __ addu(T4, T3, T1);
     __ bgtz(T1, &loop);
-    __ delay_slot()->sw(T7, Address(TMP1));
+    __ delay_slot()->sw(T7, Address(T4));
     __ Bind(&loop_exit);
 
     // Done allocating and initializing the context.
@@ -1161,11 +1161,11 @@
     // T2: potential new object start.
     // T3: potential next object start.
     __ LoadImmediate(TMP1, heap->EndAddress());
-    __ lw(TMP1, Address(TMP1));
+    __ lw(CMPRES1, Address(TMP1));
     if (FLAG_use_slow_path) {
       __ b(&slow_case);
     } else {
-      __ BranchUnsignedGreaterEqual(T3, TMP1, &slow_case);
+      __ BranchUnsignedGreaterEqual(T3, CMPRES1, &slow_case);
     }
 
     // Successfully allocated the object(s), now update top to point to
@@ -1329,11 +1329,11 @@
     // T3: address of top of heap.
     // T4: potential new context object (only if is_implicit_closure).
     __ LoadImmediate(TMP1, heap->EndAddress());
-    __ lw(TMP1, Address(TMP1));
+    __ lw(CMPRES1, Address(TMP1));
     if (FLAG_use_slow_path) {
       __ b(&slow_case);
     } else {
-      __ BranchUnsignedGreaterEqual(T3, TMP1, &slow_case);
+      __ BranchUnsignedGreaterEqual(T3, CMPRES1, &slow_case);
     }
 
     // Successfully allocated the object, now update top to point to
@@ -1688,9 +1688,9 @@
   // NoSuchMethod or closure.
   // Mark IC call that it may be a closure call that does not collect
   // type feedback.
-  __ LoadImmediate(TMP1, 1);
+  __ LoadImmediate(T6, 1);
   __ Branch(&StubCode::InstanceFunctionLookupLabel());
-  __ delay_slot()->sb(TMP1, FieldAddress(S5, ICData::is_closure_call_offset()));
+  __ delay_slot()->sb(T6, FieldAddress(S5, ICData::is_closure_call_offset()));
 
   __ Bind(&found);
   // T0: Pointer to an IC data check group.
@@ -1718,8 +1718,8 @@
   __ Bind(&get_class_id_as_smi);
   Label not_smi;
   // Test if Smi -> load Smi class for comparison.
-  __ andi(TMP1, T3, Immediate(kSmiTagMask));
-  __ bne(TMP1, ZR, &not_smi);
+  __ andi(CMPRES1, T3, Immediate(kSmiTagMask));
+  __ bne(CMPRES1, ZR, &not_smi);
   __ jr(RA);
   __ delay_slot()->addiu(T3, ZR, Immediate(Smi::RawValue(kSmiCid)));
 
@@ -1854,8 +1854,8 @@
   // Get function and call it, if possible.
   __ lw(T3, Address(T0, target_offset));
   __ lw(T4, FieldAddress(T3, Function::code_offset()));
-  __ LoadImmediate(TMP, reinterpret_cast<intptr_t>(Object::null()));
-  __ bne(T4, TMP, &target_is_compiled);
+  __ LoadImmediate(CMPRES1, reinterpret_cast<intptr_t>(Object::null()));
+  __ bne(T4, CMPRES1, &target_is_compiled);
 
   __ EnterStubFrame();
   // Preserve target function and IC data object.
@@ -1954,12 +1954,12 @@
   __ LeaveStubFrame();
 
   // Find out which dispatch stub to call.
-  __ lw(TMP1, FieldAddress(S5, ICData::num_args_tested_offset()));
+  __ lw(T1, FieldAddress(S5, ICData::num_args_tested_offset()));
 
   Label one_arg, two_args, three_args;
-  __ BranchEqual(TMP1, 1, &one_arg);
-  __ BranchEqual(TMP1, 2, &two_args);
-  __ BranchEqual(TMP1, 3, &three_args);
+  __ BranchEqual(T1, 1, &one_arg);
+  __ BranchEqual(T1, 2, &two_args);
+  __ BranchEqual(T1, 3, &three_args);
   __ Stop("Unsupported number of arguments tested.");
 
   __ Bind(&one_arg);
@@ -2121,8 +2121,8 @@
   static const intptr_t kNumArgsTested = 2;
 #if defined(DEBUG)
   { Label ok;
-    __ lw(TMP1, FieldAddress(T0, ICData::num_args_tested_offset()));
-    __ BranchEqual(TMP1, kNumArgsTested, &ok);
+    __ lw(CMPRES1, FieldAddress(T0, ICData::num_args_tested_offset()));
+    __ BranchEqual(CMPRES1, kNumArgsTested, &ok);
     __ Stop("Incorrect ICData for equality");
     __ Bind(&ok);
   }
@@ -2319,8 +2319,8 @@
   __ Bind(&reference_compare);
   __ subu(CMPRES, left, right);
   __ Bind(&done);
-  // A branch or test after this comparison will check CMPRES == TMP1.
-  __ mov(TMP1, ZR);
+  // A branch or test after this comparison will check CMPRES1 == CMPRES2.
+  __ mov(CMPRES2, ZR);
 }