Implements far branch targets for MIPS.

runtime/vm/constants_mips.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_CONSTANTS_MIPS_H_
 #define VM_CONSTANTS_MIPS_H_
 
 #include "platform/assert.h"
 
 namespace dart {
@@ skipping 168 matching lines @@
 const Register TMP = TMP1;  // Arch independent flow graph compiler needs a
                             // Register called TMP.
 const Register CTX = S6;  // Caches current context in generated code.
 const Register PP = S7;  // Caches object pool pointer in generated code.
 const Register SPREG = SP;  // Stack pointer register.
 const Register FPREG = FP;  // Frame pointer register.
 const Register ICREG = S5;  // IC data register.
 
 // The code that generates a comparison can be far away from the code that
 // generates the branch that uses the result of that comparison. In this case,
-// CMPRES is used for the result of the comparison.
-const Register CMPRES = T9;
+// CMPRES1 and CMPRES2 are used for the results of the comparison. We need two
+// since TMP is clobbered by a far branch.
+const Register CMPRES1 = T8;
+const Register CMPRES2 = T9;
+const Register CMPRES = CMPRES1;
 
 // Exception object is passed in this register to the catch handlers when an
 // exception is thrown.
 const Register kExceptionObjectReg = V0;
 
 // Stack trace object is passed in this register to the catch handlers when
 // an exception is thrown.
 const Register kStackTraceObjectReg = V1;
 
 
@@ skipping 296 matching lines @@
   // Read a bit field out of the instruction bits.
   inline int32_t Bits(int shift, int count) const {
     return (InstructionBits() >> shift) & ((1 << count) - 1);
   }
 
   // Accessors to the different named fields used in the MIPS encoding.
   inline Opcode OpcodeField() const {
     return static_cast<Opcode>(Bits(kOpcodeShift, kOpcodeBits));
   }
 
+  inline void SetOpcodeField(Opcode b) {
+    int32_t instr = InstructionBits();
+    int32_t mask = ((1 << kOpcodeBits) - 1) << kOpcodeShift;
+    SetInstructionBits((b << kOpcodeShift) | (instr & ~mask));
+  }
+
   inline Register RsField() const {
     return static_cast<Register>(Bits(kRsShift, kRsBits));
   }
 
   inline Register RtField() const {
     return static_cast<Register>(Bits(kRtShift, kRtBits));
   }
 
   inline Register RdField() const {
     return static_cast<Register>(Bits(kRdShift, kRdBits));
@@ skipping 29 matching lines @@
   }
 
   inline SpecialFunction FunctionField() const {
     return static_cast<SpecialFunction>(Bits(kFunctionShift, kFunctionBits));
   }
 
   inline RtRegImm RegImmFnField() const {
     return static_cast<RtRegImm>(Bits(kRtShift, kRtBits));
   }
 
+  inline void SetRegImmFnField(RtRegImm b) {
+    int32_t instr = InstructionBits();
+    int32_t mask = ((1 << kRtBits) - 1) << kRtShift;
+    SetInstructionBits((b << kRtShift) | (instr & ~mask));
+  }
+
   inline bool IsBreakPoint() {
     return (OpcodeField() == SPECIAL) && (FunctionField() == BREAK);
   }
 
   inline Cop1Function Cop1FunctionField() const {
     return static_cast<Cop1Function>(Bits(kCop1FnShift, kCop1FnBits));
   }
 
   inline Cop1Sub Cop1SubField() const {
     return static_cast<Cop1Sub>(Bits(kCop1SubShift, kCop1SubBits));
@@ skipping 33 matching lines @@
 #endif  // defined(DEBUG)
 
  private:
   DISALLOW_ALLOCATION();
   DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
 };
 
 }  // namespace dart
 
 #endif  // VM_CONSTANTS_MIPS_H_