Implements far branch targets for MIPS.

runtime/vm/assembler_mips_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/os.h"
 #include "vm/unit_test.h"
@@ skipping 35 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Addiu_overflow, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(static_cast<int32_t>(0x80000000),
             EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Addu, assembler) {
-  __ addiu(R2, ZR, Immediate(21));
-  __ addiu(R3, ZR, Immediate(21));
-  __ addu(V0, R2, R3);
+  __ addiu(T2, ZR, Immediate(21));
+  __ addiu(T3, ZR, Immediate(21));
+  __ addu(V0, T2, T3);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Addu, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Addu_overflow, assembler) {
-  __ LoadImmediate(R2, 0x7fffffff);
-  __ addiu(R3, R0, Immediate(1));
-  __ addu(V0, R2, R3);
+  __ LoadImmediate(T2, 0x7fffffff);
+  __ addiu(T3, R0, Immediate(1));
+  __ addu(V0, T2, T3);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Addu_overflow, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(static_cast<int32_t>(0x80000000),
             EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(And, assembler) {
-  __ addiu(R2, ZR, Immediate(42));
-  __ addiu(R3, ZR, Immediate(2));
-  __ and_(V0, R2, R3);
+  __ addiu(T2, ZR, Immediate(42));
+  __ addiu(T3, ZR, Immediate(2));
+  __ and_(V0, T2, T3);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(And, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Andi, assembler) {
-  __ addiu(R1, ZR, Immediate(42));
-  __ andi(V0, R1, Immediate(2));
+  __ addiu(T1, ZR, Immediate(42));
+  __ andi(V0, T1, Immediate(2));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Andi, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Clo, assembler) {
-  __ addiu(R1, ZR, Immediate(-1));
-  __ clo(V0, R1);
+  __ addiu(T1, ZR, Immediate(-1));
+  __ clo(V0, T1);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Clo, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Clz, assembler) {
-  __ addiu(R1, ZR, Immediate(0x7fff));
-  __ clz(V0, R1);
+  __ addiu(T1, ZR, Immediate(0x7fff));
+  __ clz(V0, T1);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Clz, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(17, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
@@ skipping 19 matching lines @@
 }
 
 
 ASSEMBLER_TEST_RUN(MthiMfhi, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Divu, assembler) {
-  __ addiu(R1, ZR, Immediate(27));
-  __ addiu(R2, ZR, Immediate(9));
-  __ divu(R1, R2);
+  __ addiu(T1, ZR, Immediate(27));
+  __ addiu(T2, ZR, Immediate(9));
+  __ divu(T1, T2);
   __ mflo(V0);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Divu, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Div, assembler) {
-  __ addiu(R1, ZR, Immediate(27));
-  __ addiu(R2, ZR, Immediate(9));
-  __ div(R1, R2);
+  __ addiu(T1, ZR, Immediate(27));
+  __ addiu(T2, ZR, Immediate(9));
+  __ div(T1, T2);
   __ mflo(V0);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Div, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Divu_corner, assembler) {
-  __ LoadImmediate(R1, 0x80000000);
-  __ LoadImmediate(R2, 0xffffffff);
-  __ divu(R1, R2);
+  __ LoadImmediate(T1, 0x80000000);
+  __ LoadImmediate(T2, 0xffffffff);
+  __ divu(T1, T2);
   __ mflo(V0);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Divu_corner, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Div_corner, assembler) {
-  __ LoadImmediate(R1, 0x80000000);
-  __ LoadImmediate(R2, 0xffffffff);
-  __ div(R1, R2);
+  __ LoadImmediate(T1, 0x80000000);
+  __ LoadImmediate(T2, 0xffffffff);
+  __ div(T1, T2);
   __ mflo(V0);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Div_corner, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(static_cast<int32_t>(0x80000000),
             EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lb, assembler) {
   __ addiu(SP, SP, Immediate(-kWordSize * 30));
-  __ LoadImmediate(R1, 0xff);
-  __ sb(R1, Address(SP));
+  __ LoadImmediate(T1, 0xff);
+  __ sb(T1, Address(SP));
   __ lb(V0, Address(SP));
   __ addiu(SP, SP, Immediate(kWordSize * 30));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Lb, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lb_offset, assembler) {
   __ addiu(SP, SP, Immediate(-kWordSize * 30));
-  __ LoadImmediate(R1, 0xff);
-  __ sb(R1, Address(SP, 1));
+  __ LoadImmediate(T1, 0xff);
+  __ sb(T1, Address(SP, 1));
   __ lb(V0, Address(SP, 1));
   __ addiu(SP, SP, Immediate(kWordSize * 30));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Lb_offset, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lbu, assembler) {
   __ addiu(SP, SP, Immediate(-kWordSize * 30));
-  __ LoadImmediate(R1, 0xff);
-  __ sb(R1, Address(SP));
+  __ LoadImmediate(T1, 0xff);
+  __ sb(T1, Address(SP));
   __ lbu(V0, Address(SP));
   __ addiu(SP, SP, Immediate(kWordSize * 30));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Lbu, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(255, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lh, assembler) {
   __ addiu(SP, SP, Immediate(-kWordSize * 30));
-  __ LoadImmediate(R1, 0xffff);
-  __ sh(R1, Address(SP));
+  __ LoadImmediate(T1, 0xffff);
+  __ sh(T1, Address(SP));
   __ lh(V0, Address(SP));
   __ addiu(SP, SP, Immediate(kWordSize * 30));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Lh, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lhu, assembler) {
   __ addiu(SP, SP, Immediate(-kWordSize * 30));
-  __ LoadImmediate(R1, 0xffff);
-  __ sh(R1, Address(SP));
+  __ LoadImmediate(T1, 0xffff);
+  __ sh(T1, Address(SP));
   __ lhu(V0, Address(SP));
   __ addiu(SP, SP, Immediate(kWordSize * 30));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Lhu, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(65535, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lw, assembler) {
   __ addiu(SP, SP, Immediate(-kWordSize * 30));
-  __ LoadImmediate(R1, -1);
-  __ sw(R1, Address(SP));
+  __ LoadImmediate(T1, -1);
+  __ sw(T1, Address(SP));
   __ lw(V0, Address(SP));
   __ addiu(SP, SP, Immediate(kWordSize * 30));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Lw, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lui, assembler) {
   __ lui(V0, Immediate(42));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Lui, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42 << 16, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sll, assembler) {
-  __ LoadImmediate(R1, 21);
-  __ sll(V0, R1, 1);
+  __ LoadImmediate(T1, 21);
+  __ sll(V0, T1, 1);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Sll, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Srl, assembler) {
-  __ LoadImmediate(R1, 84);
-  __ srl(V0, R1, 1);
+  __ LoadImmediate(T1, 84);
+  __ srl(V0, T1, 1);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Srl, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LShifting, assembler) {
-  __ LoadImmediate(R1, 1);
-  __ sll(R1, R1, 31);
-  __ srl(V0, R1, 31);
+  __ LoadImmediate(T1, 1);
+  __ sll(T1, T1, 31);
+  __ srl(V0, T1, 31);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(LShifting, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(RShifting, assembler) {
-  __ LoadImmediate(R1, 1);
-  __ sll(R1, R1, 31);
-  __ sra(V0, R1, 31);
+  __ LoadImmediate(T1, 1);
+  __ sll(T1, T1, 31);
+  __ sra(V0, T1, 31);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(RShifting, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sllv, assembler) {
-  __ LoadImmediate(R1, 21);
-  __ LoadImmediate(R2, 1);
-  __ sllv(V0, R1, R2);
+  __ LoadImmediate(T1, 21);
+  __ LoadImmediate(T2, 1);
+  __ sllv(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Sllv, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Srlv, assembler) {
-  __ LoadImmediate(R1, 84);
-  __ LoadImmediate(R2, 1);
-  __ srlv(V0, R1, R2);
+  __ LoadImmediate(T1, 84);
+  __ LoadImmediate(T2, 1);
+  __ srlv(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Srlv, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LShiftingV, assembler) {
-  __ LoadImmediate(R1, 1);
-  __ LoadImmediate(R2, 31);
-  __ sllv(R1, R1, R2);
-  __ srlv(V0, R1, R2);
+  __ LoadImmediate(T1, 1);
+  __ LoadImmediate(T2, 31);
+  __ sllv(T1, T1, T2);
+  __ srlv(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(LShiftingV, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(RShiftingV, assembler) {
-  __ LoadImmediate(R1, 1);
-  __ LoadImmediate(R2, 31);
-  __ sllv(R1, R1, R2);
-  __ srav(V0, R1, R2);
+  __ LoadImmediate(T1, 1);
+  __ LoadImmediate(T2, 31);
+  __ sllv(T1, T1, T2);
+  __ srav(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(RShiftingV, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Mult_pos, assembler) {
-  __ LoadImmediate(R1, 6);
-  __ LoadImmediate(R2, 7);
-  __ mult(R1, R2);
+  __ LoadImmediate(T1, 6);
+  __ LoadImmediate(T2, 7);
+  __ mult(T1, T2);
   __ mflo(V0);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Mult_pos, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Mult_neg, assembler) {
-  __ LoadImmediate(R1, -6);
-  __ LoadImmediate(R2, 7);
-  __ mult(R1, R2);
+  __ LoadImmediate(T1, -6);
+  __ LoadImmediate(T2, 7);
+  __ mult(T1, T2);
   __ mflo(V0);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Mult_neg, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Mult_neg_hi, assembler) {
-  __ LoadImmediate(R1, -6);
-  __ LoadImmediate(R2, 7);
-  __ mult(R1, R2);
+  __ LoadImmediate(T1, -6);
+  __ LoadImmediate(T2, 7);
+  __ mult(T1, T2);
   __ mfhi(V0);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Mult_neg_hi, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Multu_lo, assembler) {
-  __ LoadImmediate(R1, 6);
-  __ LoadImmediate(R2, 7);
-  __ multu(R1, R2);
+  __ LoadImmediate(T1, 6);
+  __ LoadImmediate(T2, 7);
+  __ multu(T1, T2);
   __ mflo(V0);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Multu_lo, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Multu_hi, assembler) {
-  __ LoadImmediate(R1, 65536);
-  __ LoadImmediate(R2, 65536);
-  __ multu(R1, R2);
+  __ LoadImmediate(T1, 65536);
+  __ LoadImmediate(T2, 65536);
+  __ multu(T1, T2);
   __ mfhi(V0);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Multu_hi, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Madd_neg, assembler) {
-  __ LoadImmediate(R1, -6);
-  __ LoadImmediate(R2, 7);
-  __ mult(R1, R2);
-  __ madd(R1, R2);
+  __ LoadImmediate(T1, -6);
+  __ LoadImmediate(T2, 7);
+  __ mult(T1, T2);
+  __ madd(T1, T2);
   __ mflo(V0);
   __ mfhi(V1);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Madd_neg, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(-84, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Subu, assembler) {
-  __ LoadImmediate(R1, 737);
-  __ LoadImmediate(R2, 695);
-  __ subu(V0, R1, R2);
+  __ LoadImmediate(T1, 737);
+  __ LoadImmediate(T2, 695);
+  __ subu(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Subu, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Or, assembler) {
-  __ LoadImmediate(R1, 34);
-  __ LoadImmediate(R2, 8);
-  __ or_(V0, R1, R2);
+  __ LoadImmediate(T1, 34);
+  __ LoadImmediate(T2, 8);
+  __ or_(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Or, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Nor, assembler) {
-  __ LoadImmediate(R1, -47);
-  __ LoadImmediate(R2, -60);
-  __ nor(V0, R1, R2);
+  __ LoadImmediate(T1, -47);
+  __ LoadImmediate(T2, -60);
+  __ nor(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Nor, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Xor, assembler) {
-  __ LoadImmediate(R1, 51);
-  __ LoadImmediate(R2, 25);
-  __ xor_(V0, R1, R2);
+  __ LoadImmediate(T1, 51);
+  __ LoadImmediate(T2, 25);
+  __ xor_(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Xor, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Xori, assembler) {
   __ LoadImmediate(T0, 51);
   __ xori(V0, T0, Immediate(25));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Xori, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Slt, assembler) {
-  __ LoadImmediate(R1, -1);
-  __ LoadImmediate(R2, 0);
-  __ slt(V0, R1, R2);
+  __ LoadImmediate(T1, -1);
+  __ LoadImmediate(T2, 0);
+  __ slt(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Slt, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sltu, assembler) {
-  __ LoadImmediate(R1, -1);
-  __ LoadImmediate(R2, 0);
-  __ sltu(V0, R1, R2);
+  __ LoadImmediate(T1, -1);
+  __ LoadImmediate(T2, 0);
+  __ sltu(V0, T1, T2);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Sltu, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Movz, assembler) {
-  __ LoadImmediate(R1, 42);
-  __ LoadImmediate(R2, 23);
-  __ slt(R3, R1, R2);
-  __ movz(V0, R1, R3);
+  __ LoadImmediate(T1, 42);
+  __ LoadImmediate(T2, 23);
+  __ slt(T3, T1, T2);
+  __ movz(V0, T1, T3);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Movz, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Movn, assembler) {
-  __ LoadImmediate(R1, 42);
-  __ LoadImmediate(R2, 23);
-  __ slt(R3, R2, R1);
-  __ movn(V0, R1, R3);
+  __ LoadImmediate(T1, 42);
+  __ LoadImmediate(T2, 23);
+  __ slt(T3, T2, T1);
+  __ movn(V0, T1, T3);
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Movn, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Jr_delay, assembler) {
   __ jr(RA);
   __ delay_slot()->ori(V0, ZR, Immediate(42));
 }
 
 
 ASSEMBLER_TEST_RUN(Jr_delay, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Beq_backward, assembler) {
   Label l;
 
-  __ LoadImmediate(R1, 0);
-  __ LoadImmediate(R2, 1);
+  __ LoadImmediate(T1, 0);
+  __ LoadImmediate(T2, 1);
   __ Bind(&l);
-  __ addiu(R1, R1, Immediate(1));
-  __ beq(R1, R2, &l);
-  __ ori(V0, R1, Immediate(0));
+  __ addiu(T1, T1, Immediate(1));
+  __ beq(T1, T2, &l);
+  __ ori(V0, T1, Immediate(0));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Beq_backward, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Beq_backward_delay, assembler) {
   Label l;
 
-  __ LoadImmediate(R1, 0);
-  __ LoadImmediate(R2, 1);
+  __ LoadImmediate(T1, 0);
+  __ LoadImmediate(T2, 1);
   __ Bind(&l);
-  __ addiu(R1, R1, Immediate(1));
-  __ beq(R1, R2, &l);
-  __ delay_slot()->addiu(R1, R1, Immediate(1));
-  __ ori(V0, R1, Immediate(0));
+  __ addiu(T1, T1, Immediate(1));
+  __ beq(T1, T2, &l);
+  __ delay_slot()->addiu(T1, T1, Immediate(1));
+  __ ori(V0, T1, Immediate(0));
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Beq_backward_delay, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
@@ skipping 335 matching lines @@
 }
 
 
 ASSEMBLER_TEST_RUN(Label_link2, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Jalr_delay, assembler) {
-  __ mov(R2, RA);
-  __ jalr(R2, RA);
+  __ mov(T2, RA);
+  __ jalr(T2, RA);
   __ delay_slot()->ori(V0, ZR, Immediate(42));
 }
 
 
 ASSEMBLER_TEST_RUN(Jalr_delay, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
@@ skipping 608 matching lines @@
                      A1);
   __ lw(RA, Address(SP, 0 * kWordSize));
   __ lw(CTX, Address(SP, 1 * kWordSize));
   __ addiu(SP, SP, Immediate(2 * kWordSize));
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS