A64: Have the simulator fpcr_ members return appropriate types.

src/a64/simulator-a64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 117 matching lines @@
 
   int32_t SignedBits(int msb, int lsb) const {
     return signed_bitextract_32(msb, lsb, value_);
   }
 
   void SetBits(int msb, int lsb, uint32_t bits);
 
   // Default system register values.
   static SimSystemRegister DefaultValueFor(SystemRegister id);
 
-#define DEFINE_GETTER(Name, HighBit, LowBit, Func)                            \
-  uint32_t Name() const { return Func(HighBit, LowBit); }              \
-  void Set##Name(uint32_t bits) { SetBits(HighBit, LowBit, bits); }
-#define DEFINE_WRITE_IGNORE_MASK(Name, Mask)                                  \
+#define DEFINE_GETTER(Name, HighBit, LowBit, Func, Type)                       \
+  Type Name() const { return static_cast<Type>(Func(HighBit, LowBit)); }       \
+  void Set##Name(Type bits) {                                                  \
+    SetBits(HighBit, LowBit, static_cast<Type>(bits));                         \
+  }
+#define DEFINE_WRITE_IGNORE_MASK(Name, Mask)                                   \
   static const uint32_t Name##WriteIgnoreMask = ~static_cast<uint32_t>(Mask);
-
   SYSTEM_REGISTER_FIELDS_LIST(DEFINE_GETTER, DEFINE_WRITE_IGNORE_MASK)
-
 #undef DEFINE_ZERO_BITS
 #undef DEFINE_GETTER
 
  protected:
   // Most system registers only implement a few of the bits in the word. Other
   // bits are "read-as-zero, write-ignored". The write_ignore_mask argument
   // describes the bits which are not modifiable.
   SimSystemRegister(uint32_t value, uint32_t write_ignore_mask)
       : value_(value), write_ignore_mask_(write_ignore_mask) { }
 
@@ skipping 367 matching lines @@
   }
 
   void set_dreg(unsigned code, double value) {
     set_fpreg(code, value);
   }
 
   void set_dreg_bits(unsigned code, uint64_t value) {
     set_fpreg(code, value);
   }
 
-  bool N() { return nzcv_.N() != 0; }
-  bool Z() { return nzcv_.Z() != 0; }
-  bool C() { return nzcv_.C() != 0; }
-  bool V() { return nzcv_.V() != 0; }
   SimSystemRegister& nzcv() { return nzcv_; }
-
-  // TODO(jbramley): Find a way to make the fpcr_ members return the proper
-  // types, so these accessors are not necessary.
-  FPRounding RMode() { return static_cast<FPRounding>(fpcr_.RMode()); }
-  bool DN() { return fpcr_.DN() != 0; }
   SimSystemRegister& fpcr() { return fpcr_; }
 
   // Debug helpers
 
   // Simulator breakpoints.
   struct Breakpoint {
     Instruction* location;
     bool enabled;
   };
   std::vector<Breakpoint> breakpoints_;
@@ skipping 56 matching lines @@
   static inline const char* XRegNameForCode(unsigned code,
       Reg31Mode mode = Reg31IsZeroRegister);
   static inline const char* SRegNameForCode(unsigned code);
   static inline const char* DRegNameForCode(unsigned code);
   static inline const char* VRegNameForCode(unsigned code);
   static inline int CodeFromName(const char* name);
 
  protected:
   // Simulation helpers ------------------------------------
   bool ConditionPassed(Condition cond) {
+    SimSystemRegister& flags = nzcv();
     switch (cond) {
       case eq:
-        return Z();
+        return flags.Z();
       case ne:
-        return !Z();
+        return !flags.Z();
       case hs:
-        return C();
+        return flags.C();
       case lo:
-        return !C();
+        return !flags.C();
       case mi:
-        return N();
+        return flags.N();
       case pl:
-        return !N();
+        return !flags.N();
       case vs:
-        return V();
+        return flags.V();
       case vc:
-        return !V();
+        return !flags.V();
       case hi:
-        return C() && !Z();
+        return flags.C() && !flags.Z();
       case ls:
-        return !(C() && !Z());
+        return !(flags.C() && !flags.Z());
       case ge:
-        return N() == V();
+        return flags.N() == flags.V();
       case lt:
-        return N() != V();
+        return flags.N() != flags.V();
       case gt:
-        return !Z() && (N() == V());
+        return !flags.Z() && (flags.N() == flags.V());
       case le:
-        return !(!Z() && (N() == V()));
+        return !(!flags.Z() && (flags.N() == flags.V()));
       case nv:  // Fall through.
       case al:
         return true;
       default:
         UNREACHABLE();
         return false;
     }
   }
 
   bool ConditionFailed(Condition cond) {
@@ skipping 249 matching lines @@
   static void UnregisterCTryCatch() {
     Simulator::current(Isolate::Current())->PopAddress();
   }
 };
 
 #endif  // !defined(USE_SIMULATOR)
 
 } }  // namespace v8::internal
 
 #endif  // V8_A64_SIMULATOR_A64_H_