Index: src/crankshaft/ia32/lithium-codegen-ia32.cc |
diff --git a/src/crankshaft/ia32/lithium-codegen-ia32.cc b/src/crankshaft/ia32/lithium-codegen-ia32.cc |
index 00761c4857a6467208403bd16cb59253dc4fec50..baebe1972655d8a09c0e0f69f18c0fc27e7de910 100644 |
--- a/src/crankshaft/ia32/lithium-codegen-ia32.cc |
+++ b/src/crankshaft/ia32/lithium-codegen-ia32.cc |
@@ -3072,8 +3072,20 @@ void LCodeGen::DoDeferredMathAbsTaggedHeapNumber(LMathAbs* instr) { |
DeoptimizeIf(not_equal, instr, Deoptimizer::kNotAHeapNumber); |
Label slow, allocated, done; |
- Register tmp = input_reg.is(eax) ? ecx : eax; |
- Register tmp2 = tmp.is(ecx) ? edx : input_reg.is(ecx) ? edx : ecx; |
+ uint32_t available_regs = 0xf; |
Jarin
2016/06/06 08:09:22
uint32_t available_regs = eax.bit() | ebx.bit() |
|
+ if (input_reg.code() < 4) available_regs ^= input_reg.bit(); |
Jarin
2016/06/06 08:09:22
available_regs &= ~input_reg.bit(); ?
|
+ if (instr->context()->IsRegister()) { |
+ // Make sure that the context isn't overwritten in the AllocateHeapNumber |
+ // macro below. |
+ Register context_reg = ToRegister(instr->context()); |
+ if (context_reg.code() < 4) available_regs ^= context_reg.bit(); |
Jarin
2016/06/06 08:09:21
available_regs &= ~context_reg.bit();
|
+ } |
+ |
+ Register tmp = |
+ Register::from_code(base::bits::CountTrailingZeros32(available_regs)); |
+ available_regs ^= tmp.bit(); |
Jarin
2016/06/06 08:09:22
For consistency, may even here:
DCHECK(available_
|
+ Register tmp2 = |
+ Register::from_code(base::bits::CountTrailingZeros32(available_regs)); |
Jarin
2016/06/06 08:09:22
DCHECK(available_regs & tmp2.bit());
|
// Preserve the value of all registers. |
PushSafepointRegistersScope scope(this); |