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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/compiler/common-operator.h" | 5 #include "src/compiler/common-operator.h" |
| 6 #include "src/compiler/graph.h" | 6 #include "src/compiler/graph.h" |
| 7 #include "src/compiler/instruction.h" | 7 #include "src/compiler/instruction.h" |
| 8 #include "src/compiler/schedule.h" | 8 #include "src/compiler/schedule.h" |
| 9 #include "src/compiler/state-values-utils.h" | 9 #include "src/compiler/state-values-utils.h" |
| 10 | 10 |
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| 119 case ImmediateOperand::INLINE: | 119 case ImmediateOperand::INLINE: |
| 120 return os << "#" << imm.inline_value(); | 120 return os << "#" << imm.inline_value(); |
| 121 case ImmediateOperand::INDEXED: | 121 case ImmediateOperand::INDEXED: |
| 122 return os << "[immediate:" << imm.indexed_value() << "]"; | 122 return os << "[immediate:" << imm.indexed_value() << "]"; |
| 123 } | 123 } |
| 124 } | 124 } |
| 125 case InstructionOperand::EXPLICIT: | 125 case InstructionOperand::EXPLICIT: |
| 126 case InstructionOperand::ALLOCATED: { | 126 case InstructionOperand::ALLOCATED: { |
| 127 LocationOperand allocated = LocationOperand::cast(op); | 127 LocationOperand allocated = LocationOperand::cast(op); |
| 128 if (op.IsStackSlot()) { | 128 if (op.IsStackSlot()) { |
| 129 os << "[stack:" << LocationOperand::cast(op).index(); | 129 os << "[stack:" << allocated.index(); |
| 130 } else if (op.IsFPStackSlot()) { | 130 } else if (op.IsFPStackSlot()) { |
| 131 os << "[fp_stack:" << LocationOperand::cast(op).index(); | 131 os << "[fp_stack:" << allocated.index(); |
| 132 } else if (op.IsRegister()) { | 132 } else if (op.IsRegister()) { |
| 133 os << "[" << LocationOperand::cast(op).GetRegister().ToString() << "|R"; | 133 os << "[" << allocated.GetRegister().ToString() << "|R"; |
| 134 } else if (op.IsDoubleRegister()) { |
| 135 os << "[" << allocated.GetDoubleRegister().ToString() << "|R"; |
| 134 } else { | 136 } else { |
| 135 DCHECK(op.IsFPRegister()); | 137 DCHECK(op.IsFloatRegister()); |
| 136 os << "[" << LocationOperand::cast(op).GetDoubleRegister().ToString() | 138 os << "[" << allocated.GetFloatRegister().ToString() << "|R"; |
| 137 << "|R"; | |
| 138 } | 139 } |
| 139 if (allocated.IsExplicit()) { | 140 if (allocated.IsExplicit()) { |
| 140 os << "|E"; | 141 os << "|E"; |
| 141 } | 142 } |
| 142 switch (allocated.representation()) { | 143 switch (allocated.representation()) { |
| 143 case MachineRepresentation::kNone: | 144 case MachineRepresentation::kNone: |
| 144 os << "|-"; | 145 os << "|-"; |
| 145 break; | 146 break; |
| 146 case MachineRepresentation::kBit: | 147 case MachineRepresentation::kBit: |
| 147 os << "|b"; | 148 os << "|b"; |
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| 240 if (replacement != nullptr) move->set_source(replacement->source()); | 241 if (replacement != nullptr) move->set_source(replacement->source()); |
| 241 return to_eliminate; | 242 return to_eliminate; |
| 242 } | 243 } |
| 243 | 244 |
| 244 | 245 |
| 245 ExplicitOperand::ExplicitOperand(LocationKind kind, MachineRepresentation rep, | 246 ExplicitOperand::ExplicitOperand(LocationKind kind, MachineRepresentation rep, |
| 246 int index) | 247 int index) |
| 247 : LocationOperand(EXPLICIT, kind, rep, index) { | 248 : LocationOperand(EXPLICIT, kind, rep, index) { |
| 248 DCHECK_IMPLIES(kind == REGISTER && !IsFloatingPoint(rep), | 249 DCHECK_IMPLIES(kind == REGISTER && !IsFloatingPoint(rep), |
| 249 Register::from_code(index).IsAllocatable()); | 250 Register::from_code(index).IsAllocatable()); |
| 250 DCHECK_IMPLIES(kind == REGISTER && IsFloatingPoint(rep), | 251 DCHECK_IMPLIES(kind == REGISTER && (rep == MachineRepresentation::kFloat32), |
| 252 FloatRegister::from_code(index).IsAllocatable()); |
| 253 DCHECK_IMPLIES(kind == REGISTER && (rep == MachineRepresentation::kFloat64), |
| 251 DoubleRegister::from_code(index).IsAllocatable()); | 254 DoubleRegister::from_code(index).IsAllocatable()); |
| 252 } | 255 } |
| 253 | 256 |
| 254 Instruction::Instruction(InstructionCode opcode) | 257 Instruction::Instruction(InstructionCode opcode) |
| 255 : opcode_(opcode), | 258 : opcode_(opcode), |
| 256 bit_field_(OutputCountField::encode(0) | InputCountField::encode(0) | | 259 bit_field_(OutputCountField::encode(0) | InputCountField::encode(0) | |
| 257 TempCountField::encode(0) | IsCallField::encode(false)), | 260 TempCountField::encode(0) | IsCallField::encode(false)), |
| 258 reference_map_(nullptr), | 261 reference_map_(nullptr), |
| 259 block_(nullptr) { | 262 block_(nullptr) { |
| 260 parallel_moves_[0] = nullptr; | 263 parallel_moves_[0] = nullptr; |
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| 1026 } | 1029 } |
| 1027 for (int i = 0; i < code.InstructionBlockCount(); i++) { | 1030 for (int i = 0; i < code.InstructionBlockCount(); i++) { |
| 1028 printable.sequence_->PrintBlock(printable.register_configuration_, i); | 1031 printable.sequence_->PrintBlock(printable.register_configuration_, i); |
| 1029 } | 1032 } |
| 1030 return os; | 1033 return os; |
| 1031 } | 1034 } |
| 1032 | 1035 |
| 1033 } // namespace compiler | 1036 } // namespace compiler |
| 1034 } // namespace internal | 1037 } // namespace internal |
| 1035 } // namespace v8 | 1038 } // namespace v8 |
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