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Side by Side Diff: tests_lit/llvm2ice_tests/fp.arith.ll

Issue 2027773002: Subzero, MIPS32: Handling floating point instructions fadd, fsub, fmul, fdiv (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: RC changes Created 4 years, 5 months ago
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1 ; This tries to be a comprehensive test of f32 and f64 arith operations. 1 ; This tries to be a comprehensive test of f32 and f64 arith operations.
2 ; The CHECK lines are only checking for basic instruction patterns 2 ; The CHECK lines are only checking for basic instruction patterns
3 ; that should be present regardless of the optimization level, so 3 ; that should be present regardless of the optimization level, so
4 ; there are no special OPTM1 match lines. 4 ; there are no special OPTM1 match lines.
5 5
6 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 6 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
7 ; RUN: --target x8632 -i %s --args -O2 \ 7 ; RUN: --target x8632 -i %s --args -O2 \
8 ; RUN: | %if --need=target_X8632 --command FileCheck %s 8 ; RUN: | %if --need=target_X8632 --command FileCheck %s
9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
10 ; RUN: --target x8632 -i %s --args -Om1 \ 10 ; RUN: --target x8632 -i %s --args -Om1 \
11 ; RUN: | %if --need=target_X8632 --command FileCheck %s 11 ; RUN: | %if --need=target_X8632 --command FileCheck %s
12 12
13 ; RUN: %if --need=target_ARM32 --need=allow_dump \ 13 ; RUN: %if --need=target_ARM32 --need=allow_dump \
14 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \ 14 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
15 ; RUN: -i %s --args -O2 --skip-unimplemented \ 15 ; RUN: -i %s --args -O2 --skip-unimplemented \
16 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ 16 ; RUN: | %if --need=target_ARM32 --need=allow_dump \
17 ; RUN: --command FileCheck --check-prefix ARM32 %s 17 ; RUN: --command FileCheck --check-prefix ARM32 %s
18 ; RUN: %if --need=target_ARM32 --need=allow_dump \ 18 ; RUN: %if --need=target_ARM32 --need=allow_dump \
19 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \ 19 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
20 ; RUN: -i %s --args -Om1 --skip-unimplemented \ 20 ; RUN: -i %s --args -Om1 --skip-unimplemented \
21 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ 21 ; RUN: | %if --need=target_ARM32 --need=allow_dump \
22 ; RUN: --command FileCheck --check-prefix ARM32 %s 22 ; RUN: --command FileCheck --check-prefix ARM32 %s
23 23
24 ; RUN: %if --need=target_MIPS32 --need=allow_dump \
25 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \
26 ; RUN: mips32 -i %s --args -O2 --skip-unimplemented \
27 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \
28 ; RUN: --command FileCheck --check-prefix MIPS32 %s
29 ; RUN: %if --need=target_MIPS32 --need=allow_dump \
30 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \
31 ; RUN: mips32 -i %s --args -Om1 --skip-unimplemented \
32 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \
33 ; RUN: --command FileCheck --check-prefix MIPS32 %s
34
24 define internal float @addFloat(float %a, float %b) { 35 define internal float @addFloat(float %a, float %b) {
25 entry: 36 entry:
26 %add = fadd float %a, %b 37 %add = fadd float %a, %b
27 ret float %add 38 ret float %add
28 } 39 }
29 ; CHECK-LABEL: addFloat 40 ; CHECK-LABEL: addFloat
30 ; CHECK: addss 41 ; CHECK: addss
31 ; CHECK: fld 42 ; CHECK: fld
32 ; ARM32-LABEL: addFloat 43 ; ARM32-LABEL: addFloat
33 ; ARM32: vadd.f32 s{{[0-9]+}}, s 44 ; ARM32: vadd.f32 s{{[0-9]+}}, s
45 ; MIPS32-LABEL: addFloat
46 ; MIPS32: add.s
34 47
35 define internal double @addDouble(double %a, double %b) { 48 define internal double @addDouble(double %a, double %b) {
36 entry: 49 entry:
37 %add = fadd double %a, %b 50 %add = fadd double %a, %b
38 ret double %add 51 ret double %add
39 } 52 }
40 ; CHECK-LABEL: addDouble 53 ; CHECK-LABEL: addDouble
41 ; CHECK: addsd 54 ; CHECK: addsd
42 ; CHECK: fld 55 ; CHECK: fld
43 ; ARM32-LABEL: addDouble 56 ; ARM32-LABEL: addDouble
44 ; ARM32: vadd.f64 d{{[0-9]+}}, d 57 ; ARM32: vadd.f64 d{{[0-9]+}}, d
58 ; MIPS32-LABEL: addDouble
59 ; MIPS32: add.d
45 60
46 define internal float @subFloat(float %a, float %b) { 61 define internal float @subFloat(float %a, float %b) {
47 entry: 62 entry:
48 %sub = fsub float %a, %b 63 %sub = fsub float %a, %b
49 ret float %sub 64 ret float %sub
50 } 65 }
51 ; CHECK-LABEL: subFloat 66 ; CHECK-LABEL: subFloat
52 ; CHECK: subss 67 ; CHECK: subss
53 ; CHECK: fld 68 ; CHECK: fld
54 ; ARM32-LABEL: subFloat 69 ; ARM32-LABEL: subFloat
55 ; ARM32: vsub.f32 s{{[0-9]+}}, s 70 ; ARM32: vsub.f32 s{{[0-9]+}}, s
71 ; MIPS32-LABEL: subFloat
72 ; MIPS32: sub.s
56 73
57 define internal double @subDouble(double %a, double %b) { 74 define internal double @subDouble(double %a, double %b) {
58 entry: 75 entry:
59 %sub = fsub double %a, %b 76 %sub = fsub double %a, %b
60 ret double %sub 77 ret double %sub
61 } 78 }
62 ; CHECK-LABEL: subDouble 79 ; CHECK-LABEL: subDouble
63 ; CHECK: subsd 80 ; CHECK: subsd
64 ; CHECK: fld 81 ; CHECK: fld
65 ; ARM32-LABEL: subDouble 82 ; ARM32-LABEL: subDouble
66 ; ARM32: vsub.f64 d{{[0-9]+}}, d 83 ; ARM32: vsub.f64 d{{[0-9]+}}, d
84 ; MIPS32-LABEL: subDouble
85 ; MIPS32: sub.d
67 86
68 define internal float @mulFloat(float %a, float %b) { 87 define internal float @mulFloat(float %a, float %b) {
69 entry: 88 entry:
70 %mul = fmul float %a, %b 89 %mul = fmul float %a, %b
71 ret float %mul 90 ret float %mul
72 } 91 }
73 ; CHECK-LABEL: mulFloat 92 ; CHECK-LABEL: mulFloat
74 ; CHECK: mulss 93 ; CHECK: mulss
75 ; CHECK: fld 94 ; CHECK: fld
76 ; ARM32-LABEL: mulFloat 95 ; ARM32-LABEL: mulFloat
77 ; ARM32: vmul.f32 s{{[0-9]+}}, s 96 ; ARM32: vmul.f32 s{{[0-9]+}}, s
97 ; MIPS32-LABEL: mulFloat
98 ; MIPS32: mul.s
78 99
79 define internal double @mulDouble(double %a, double %b) { 100 define internal double @mulDouble(double %a, double %b) {
80 entry: 101 entry:
81 %mul = fmul double %a, %b 102 %mul = fmul double %a, %b
82 ret double %mul 103 ret double %mul
83 } 104 }
84 ; CHECK-LABEL: mulDouble 105 ; CHECK-LABEL: mulDouble
85 ; CHECK: mulsd 106 ; CHECK: mulsd
86 ; CHECK: fld 107 ; CHECK: fld
87 ; ARM32-LABEL: mulDouble 108 ; ARM32-LABEL: mulDouble
88 ; ARM32: vmul.f64 d{{[0-9]+}}, d 109 ; ARM32: vmul.f64 d{{[0-9]+}}, d
110 ; MIPS32-LABEL: mulDouble
111 ; MIPS32: mul.d
89 112
90 define internal float @divFloat(float %a, float %b) { 113 define internal float @divFloat(float %a, float %b) {
91 entry: 114 entry:
92 %div = fdiv float %a, %b 115 %div = fdiv float %a, %b
93 ret float %div 116 ret float %div
94 } 117 }
95 ; CHECK-LABEL: divFloat 118 ; CHECK-LABEL: divFloat
96 ; CHECK: divss 119 ; CHECK: divss
97 ; CHECK: fld 120 ; CHECK: fld
98 ; ARM32-LABEL: divFloat 121 ; ARM32-LABEL: divFloat
99 ; ARM32: vdiv.f32 s{{[0-9]+}}, s 122 ; ARM32: vdiv.f32 s{{[0-9]+}}, s
123 ; MIPS32-LABEL: divFloat
124 ; MIPS32: div.s
100 125
101 define internal double @divDouble(double %a, double %b) { 126 define internal double @divDouble(double %a, double %b) {
102 entry: 127 entry:
103 %div = fdiv double %a, %b 128 %div = fdiv double %a, %b
104 ret double %div 129 ret double %div
105 } 130 }
106 ; CHECK-LABEL: divDouble 131 ; CHECK-LABEL: divDouble
107 ; CHECK: divsd 132 ; CHECK: divsd
108 ; CHECK: fld 133 ; CHECK: fld
109 ; ARM32-LABEL: divDouble 134 ; ARM32-LABEL: divDouble
110 ; ARM32: vdiv.f64 d{{[0-9]+}}, d 135 ; ARM32: vdiv.f64 d{{[0-9]+}}, d
136 ; MIPS32-LABEL: divDouble
137 ; MIPS32: div.d
111 138
112 define internal float @remFloat(float %a, float %b) { 139 define internal float @remFloat(float %a, float %b) {
113 entry: 140 entry:
114 %div = frem float %a, %b 141 %div = frem float %a, %b
115 ret float %div 142 ret float %div
116 } 143 }
117 ; CHECK-LABEL: remFloat 144 ; CHECK-LABEL: remFloat
118 ; CHECK: call {{.*}} R_{{.*}} fmodf 145 ; CHECK: call {{.*}} R_{{.*}} fmodf
119 ; ARM32-LABEL: remFloat 146 ; ARM32-LABEL: remFloat
120 ; ARM32: bl {{.*}} fmodf 147 ; ARM32: bl {{.*}} fmodf
121 148
122 define internal double @remDouble(double %a, double %b) { 149 define internal double @remDouble(double %a, double %b) {
123 entry: 150 entry:
124 %div = frem double %a, %b 151 %div = frem double %a, %b
125 ret double %div 152 ret double %div
126 } 153 }
127 ; CHECK-LABEL: remDouble 154 ; CHECK-LABEL: remDouble
128 ; CHECK: call {{.*}} R_{{.*}} fmod 155 ; CHECK: call {{.*}} R_{{.*}} fmod
129 ; ARM32-LABEL: remDouble 156 ; ARM32-LABEL: remDouble
130 ; ARM32: bl {{.*}} fmod 157 ; ARM32: bl {{.*}} fmod
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