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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_X64_ASSEMBLER_X64_INL_H_ | 5 #ifndef V8_X64_ASSEMBLER_X64_INL_H_ |
6 #define V8_X64_ASSEMBLER_X64_INL_H_ | 6 #define V8_X64_ASSEMBLER_X64_INL_H_ |
7 | 7 |
8 #include "src/x64/assembler-x64.h" | 8 #include "src/x64/assembler-x64.h" |
9 | 9 |
10 #include "src/base/cpu.h" | 10 #include "src/base/cpu.h" |
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172 void Assembler::emit_optional_rex_32(Register reg, XMMRegister base) { | 172 void Assembler::emit_optional_rex_32(Register reg, XMMRegister base) { |
173 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3; | 173 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3; |
174 if (rex_bits != 0) emit(0x40 | rex_bits); | 174 if (rex_bits != 0) emit(0x40 | rex_bits); |
175 } | 175 } |
176 | 176 |
177 | 177 |
178 void Assembler::emit_optional_rex_32(Register rm_reg) { | 178 void Assembler::emit_optional_rex_32(Register rm_reg) { |
179 if (rm_reg.high_bit()) emit(0x41); | 179 if (rm_reg.high_bit()) emit(0x41); |
180 } | 180 } |
181 | 181 |
182 void Assembler::emit_optional_rex_32(XMMRegister reg) { | 182 void Assembler::emit_optional_rex_32(XMMRegister rm_reg) { |
183 byte rex_bits = (reg.code() & 0x8) >> 1; | 183 if (rm_reg.high_bit()) emit(0x41); |
184 if (rex_bits != 0) emit(0x40 | rex_bits); | |
185 } | 184 } |
186 | 185 |
187 void Assembler::emit_optional_rex_32(const Operand& op) { | 186 void Assembler::emit_optional_rex_32(const Operand& op) { |
188 if (op.rex_ != 0) emit(0x40 | op.rex_); | 187 if (op.rex_ != 0) emit(0x40 | op.rex_); |
189 } | 188 } |
190 | 189 |
191 | 190 |
192 // byte 1 of 3-byte VEX | 191 // byte 1 of 3-byte VEX |
193 void Assembler::emit_vex3_byte1(XMMRegister reg, XMMRegister rm, | 192 void Assembler::emit_vex3_byte1(XMMRegister reg, XMMRegister rm, |
194 LeadingOpcode m) { | 193 LeadingOpcode m) { |
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609 void Operand::set_disp64(int64_t disp) { | 608 void Operand::set_disp64(int64_t disp) { |
610 DCHECK_EQ(1, len_); | 609 DCHECK_EQ(1, len_); |
611 int64_t* p = reinterpret_cast<int64_t*>(&buf_[len_]); | 610 int64_t* p = reinterpret_cast<int64_t*>(&buf_[len_]); |
612 *p = disp; | 611 *p = disp; |
613 len_ += sizeof(disp); | 612 len_ += sizeof(disp); |
614 } | 613 } |
615 } // namespace internal | 614 } // namespace internal |
616 } // namespace v8 | 615 } // namespace v8 |
617 | 616 |
618 #endif // V8_X64_ASSEMBLER_X64_INL_H_ | 617 #endif // V8_X64_ASSEMBLER_X64_INL_H_ |
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