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| 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 173 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 184 } | 184 } |
| 185 | 185 |
| 186 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) { | 186 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 187 Context.insert<InstMIPS32Add_s>(Dest, Src0, Src1); | 187 Context.insert<InstMIPS32Add_s>(Dest, Src0, Src1); |
| 188 } | 188 } |
| 189 | 189 |
| 190 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) { | 190 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) { |
| 191 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm); | 191 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm); |
| 192 } | 192 } |
| 193 | 193 |
| 194 void _cvt_d_l(Variable *Dest, Variable *Src) { |
| 195 Context.insert<InstMIPS32Cvt_d_l>(Dest, Src); |
| 196 } |
| 197 |
| 198 void _cvt_d_s(Variable *Dest, Variable *Src) { |
| 199 Context.insert<InstMIPS32Cvt_d_s>(Dest, Src); |
| 200 } |
| 201 |
| 202 void _cvt_d_w(Variable *Dest, Variable *Src) { |
| 203 Context.insert<InstMIPS32Cvt_d_w>(Dest, Src); |
| 204 } |
| 205 |
| 206 void _cvt_s_d(Variable *Dest, Variable *Src) { |
| 207 Context.insert<InstMIPS32Cvt_s_d>(Dest, Src); |
| 208 } |
| 209 |
| 210 void _cvt_s_l(Variable *Dest, Variable *Src) { |
| 211 Context.insert<InstMIPS32Cvt_s_l>(Dest, Src); |
| 212 } |
| 213 |
| 214 void _cvt_s_w(Variable *Dest, Variable *Src) { |
| 215 Context.insert<InstMIPS32Cvt_s_w>(Dest, Src); |
| 216 } |
| 217 |
| 194 void _div(Variable *Dest, Variable *Src0, Variable *Src1) { | 218 void _div(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 195 Context.insert<InstMIPS32Div>(Dest, Src0, Src1); | 219 Context.insert<InstMIPS32Div>(Dest, Src0, Src1); |
| 196 } | 220 } |
| 197 | 221 |
| 198 void _div_d(Variable *Dest, Variable *Src0, Variable *Src1) { | 222 void _div_d(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 199 Context.insert<InstMIPS32Div_d>(Dest, Src0, Src1); | 223 Context.insert<InstMIPS32Div_d>(Dest, Src0, Src1); |
| 200 } | 224 } |
| 201 | 225 |
| 202 void _div_s(Variable *Dest, Variable *Src0, Variable *Src1) { | 226 void _div_s(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 203 Context.insert<InstMIPS32Div_s>(Dest, Src0, Src1); | 227 Context.insert<InstMIPS32Div_s>(Dest, Src0, Src1); |
| 204 } | 228 } |
| 205 | 229 |
| 206 void _divu(Variable *Dest, Variable *Src0, Variable *Src1) { | 230 void _divu(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 207 Context.insert<InstMIPS32Divu>(Dest, Src0, Src1); | 231 Context.insert<InstMIPS32Divu>(Dest, Src0, Src1); |
| 208 } | 232 } |
| 209 | 233 |
| 234 void _ldc1(Variable *Value, OperandMIPS32Mem *Mem) { |
| 235 Context.insert<InstMIPS32Ldc1>(Value, Mem); |
| 236 } |
| 237 |
| 238 void _lwc1(Variable *Value, OperandMIPS32Mem *Mem) { |
| 239 Context.insert<InstMIPS32Lwc1>(Value, Mem); |
| 240 } |
| 241 |
| 210 void _lui(Variable *Dest, uint32_t Imm) { | 242 void _lui(Variable *Dest, uint32_t Imm) { |
| 211 Context.insert<InstMIPS32Lui>(Dest, Imm); | 243 Context.insert<InstMIPS32Lui>(Dest, Imm); |
| 212 } | 244 } |
| 213 | 245 |
| 214 void _mov(Variable *Dest, Operand *Src0) { | 246 void _mov(Variable *Dest, Operand *Src0) { |
| 215 assert(Dest != nullptr); | 247 assert(Dest != nullptr); |
| 216 // Variable* Src0_ = llvm::dyn_cast<Variable>(Src0); | 248 // Variable* Src0_ = llvm::dyn_cast<Variable>(Src0); |
| 217 if (llvm::isa<ConstantRelocatable>(Src0)) { | 249 if (llvm::isa<ConstantRelocatable>(Src0)) { |
| 218 Context.insert<InstMIPS32La>(Dest, Src0); | 250 Context.insert<InstMIPS32La>(Dest, Src0); |
| 219 } else { | 251 } else { |
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| 280 } | 312 } |
| 281 | 313 |
| 282 void _or(Variable *Dest, Variable *Src0, Variable *Src1) { | 314 void _or(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 283 Context.insert<InstMIPS32Or>(Dest, Src0, Src1); | 315 Context.insert<InstMIPS32Or>(Dest, Src0, Src1); |
| 284 } | 316 } |
| 285 | 317 |
| 286 void _ori(Variable *Dest, Variable *Src, uint32_t Imm) { | 318 void _ori(Variable *Dest, Variable *Src, uint32_t Imm) { |
| 287 Context.insert<InstMIPS32Ori>(Dest, Src, Imm); | 319 Context.insert<InstMIPS32Ori>(Dest, Src, Imm); |
| 288 } | 320 } |
| 289 | 321 |
| 322 void _sdc1(Variable *Value, OperandMIPS32Mem *Mem) { |
| 323 Context.insert<InstMIPS32Sdc1>(Value, Mem); |
| 324 } |
| 325 |
| 290 void _sll(Variable *Dest, Variable *Src, uint32_t Imm) { | 326 void _sll(Variable *Dest, Variable *Src, uint32_t Imm) { |
| 291 Context.insert<InstMIPS32Sll>(Dest, Src, Imm); | 327 Context.insert<InstMIPS32Sll>(Dest, Src, Imm); |
| 292 } | 328 } |
| 293 | 329 |
| 294 void _sllv(Variable *Dest, Variable *Src0, Variable *Src1) { | 330 void _sllv(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 295 Context.insert<InstMIPS32Sllv>(Dest, Src0, Src1); | 331 Context.insert<InstMIPS32Sllv>(Dest, Src0, Src1); |
| 296 } | 332 } |
| 297 | 333 |
| 298 void _slt(Variable *Dest, Variable *Src0, Variable *Src1) { | 334 void _slt(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 299 Context.insert<InstMIPS32Slt>(Dest, Src0, Src1); | 335 Context.insert<InstMIPS32Slt>(Dest, Src0, Src1); |
| (...skipping 40 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 340 } | 376 } |
| 341 | 377 |
| 342 void _subu(Variable *Dest, Variable *Src0, Variable *Src1) { | 378 void _subu(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 343 Context.insert<InstMIPS32Subu>(Dest, Src0, Src1); | 379 Context.insert<InstMIPS32Subu>(Dest, Src0, Src1); |
| 344 } | 380 } |
| 345 | 381 |
| 346 void _sw(Variable *Value, OperandMIPS32Mem *Mem) { | 382 void _sw(Variable *Value, OperandMIPS32Mem *Mem) { |
| 347 Context.insert<InstMIPS32Sw>(Value, Mem); | 383 Context.insert<InstMIPS32Sw>(Value, Mem); |
| 348 } | 384 } |
| 349 | 385 |
| 386 void _swc1(Variable *Value, OperandMIPS32Mem *Mem) { |
| 387 Context.insert<InstMIPS32Swc1>(Value, Mem); |
| 388 } |
| 389 |
| 390 void _trunc_l_d(Variable *Dest, Variable *Src) { |
| 391 Context.insert<InstMIPS32Trunc_l_d>(Dest, Src); |
| 392 } |
| 393 |
| 394 void _trunc_l_s(Variable *Dest, Variable *Src) { |
| 395 Context.insert<InstMIPS32Trunc_l_s>(Dest, Src); |
| 396 } |
| 397 |
| 398 void _trunc_w_d(Variable *Dest, Variable *Src) { |
| 399 Context.insert<InstMIPS32Trunc_w_d>(Dest, Src); |
| 400 } |
| 401 |
| 402 void _trunc_w_s(Variable *Dest, Variable *Src) { |
| 403 Context.insert<InstMIPS32Trunc_w_s>(Dest, Src); |
| 404 } |
| 405 |
| 350 void _xor(Variable *Dest, Variable *Src0, Variable *Src1) { | 406 void _xor(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 351 Context.insert<InstMIPS32Xor>(Dest, Src0, Src1); | 407 Context.insert<InstMIPS32Xor>(Dest, Src0, Src1); |
| 352 } | 408 } |
| 353 | 409 |
| 354 void _xori(Variable *Dest, Variable *Src, uint32_t Imm) { | 410 void _xori(Variable *Dest, Variable *Src, uint32_t Imm) { |
| 355 Context.insert<InstMIPS32Xori>(Dest, Src, Imm); | 411 Context.insert<InstMIPS32Xori>(Dest, Src, Imm); |
| 356 } | 412 } |
| 357 | 413 |
| 358 void lowerArguments() override; | 414 void lowerArguments() override; |
| 359 | 415 |
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| 561 explicit TargetHeaderMIPS32(GlobalContext *Ctx); | 617 explicit TargetHeaderMIPS32(GlobalContext *Ctx); |
| 562 | 618 |
| 563 private: | 619 private: |
| 564 ~TargetHeaderMIPS32() = default; | 620 ~TargetHeaderMIPS32() = default; |
| 565 }; | 621 }; |
| 566 | 622 |
| 567 } // end of namespace MIPS32 | 623 } // end of namespace MIPS32 |
| 568 } // end of namespace Ice | 624 } // end of namespace Ice |
| 569 | 625 |
| 570 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H | 626 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
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