Subzero, MIPS32: Floating point load/store and format conversion instructions

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 42 matching lines @@
   // assert(!isNegAddrMode());
   NumVars = 1;
   Vars = &this->Base;
 }
 
 const char *InstMIPS32::getWidthString(Type Ty) {
   (void)Ty;
   return "TBD";
 }
 
-template <> const char *InstMIPS32Addiu::Opcode = "addiu";
-template <> const char *InstMIPS32Lui::Opcode = "lui";
-template <> const char *InstMIPS32La::Opcode = "la";
-// Three-addr ops
 template <> const char *InstMIPS32Add::Opcode = "add";
 template <> const char *InstMIPS32Add_d::Opcode = "add.d";
 template <> const char *InstMIPS32Add_s::Opcode = "add.s";
+template <> const char *InstMIPS32Addiu::Opcode = "addiu";
 template <> const char *InstMIPS32Addu::Opcode = "addu";
 template <> const char *InstMIPS32And::Opcode = "and";
 template <> const char *InstMIPS32Andi::Opcode = "andi";
+template <> const char *InstMIPS32Cvt_d_l::Opcode = "cvt.d.l";
+template <> const char *InstMIPS32Cvt_d_s::Opcode = "cvt.d.s";
+template <> const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w";
+template <> const char *InstMIPS32Cvt_s_d::Opcode = "cvt.s.d";
+template <> const char *InstMIPS32Cvt_s_l::Opcode = "cvt.s.l";
+template <> const char *InstMIPS32Cvt_s_w::Opcode = "cvt.s.w";
 template <> const char *InstMIPS32Div::Opcode = "div";
 template <> const char *InstMIPS32Div_d::Opcode = "div.d";
 template <> const char *InstMIPS32Div_s::Opcode = "div.s";
 template <> const char *InstMIPS32Divu::Opcode = "divu";
+template <> const char *InstMIPS32La::Opcode = "la";
+template <> const char *InstMIPS32Ldc1::Opcode = "ldc1";
+template <> const char *InstMIPS32Lui::Opcode = "lui";
+template <> const char *InstMIPS32Lwc1::Opcode = "lwc1";
 template <> const char *InstMIPS32Mfc1::Opcode = "mfc1";
 template <> const char *InstMIPS32Mfhi::Opcode = "mfhi";
 template <> const char *InstMIPS32Mflo::Opcode = "mflo";
 template <> const char *InstMIPS32Mov_d::Opcode = "mov.d";
 template <> const char *InstMIPS32Mov_s::Opcode = "mov.s";
 template <> const char *InstMIPS32Mtc1::Opcode = "mtc1";
 template <> const char *InstMIPS32Mthi::Opcode = "mthi";
 template <> const char *InstMIPS32Mtlo::Opcode = "mtlo";
 template <> const char *InstMIPS32Mul::Opcode = "mul";
 template <> const char *InstMIPS32Mul_d::Opcode = "mul.d";
 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s";
 template <> const char *InstMIPS32Mult::Opcode = "mult";
 template <> const char *InstMIPS32Multu::Opcode = "multu";
 template <> const char *InstMIPS32Or::Opcode = "or";
 template <> const char *InstMIPS32Ori::Opcode = "ori";
+template <> const char *InstMIPS32Sdc1::Opcode = "sdc1";
 template <> const char *InstMIPS32Sll::Opcode = "sll";
 template <> const char *InstMIPS32Sllv::Opcode = "sllv";
 template <> const char *InstMIPS32Slt::Opcode = "slt";
 template <> const char *InstMIPS32Slti::Opcode = "slti";
 template <> const char *InstMIPS32Sltiu::Opcode = "sltiu";
 template <> const char *InstMIPS32Sltu::Opcode = "sltu";
 template <> const char *InstMIPS32Sra::Opcode = "sra";
 template <> const char *InstMIPS32Srav::Opcode = "srav";
 template <> const char *InstMIPS32Srl::Opcode = "srl";
 template <> const char *InstMIPS32Srlv::Opcode = "srlv";
 template <> const char *InstMIPS32Sub::Opcode = "sub";
 template <> const char *InstMIPS32Sub_d::Opcode = "sub.d";
 template <> const char *InstMIPS32Sub_s::Opcode = "sub.s";
 template <> const char *InstMIPS32Subu::Opcode = "subu";
 template <> const char *InstMIPS32Sw::Opcode = "sw";
+template <> const char *InstMIPS32Swc1::Opcode = "swc1";
+template <> const char *InstMIPS32Trunc_l_d::Opcode = "trunc.l.d";
+template <> const char *InstMIPS32Trunc_l_s::Opcode = "trunc.l.s";
+template <> const char *InstMIPS32Trunc_w_d::Opcode = "trunc.w.d";
+template <> const char *InstMIPS32Trunc_w_s::Opcode = "trunc.w.s";
 template <> const char *InstMIPS32Xor::Opcode = "xor";
 template <> const char *InstMIPS32Xori::Opcode = "xori";
 
 template <> void InstMIPS32Mflo::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   emitUnaryopGPRFLoHi(Opcode, this, Func);
 }
 
 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const {
@@ skipping 442 matching lines @@
   }
 
   Str << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice