Subzero, MIPS32: Floating point load/store and format conversion instructions

src/IceTargetLoweringMIPS32.h

 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 173 matching lines @@
   }
 
   void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Add_s>(Dest, Src0, Src1);
   }
 
   void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert<InstMIPS32Addiu>(Dest, Src, Imm);
   }
 
+  //void _bc1t(...) {

[John, 2016/06/01 15:01:05]

what do these comments mean?

[obucinac, 2016/06/01 16:38:10]

Removed for now.

+  //  Context.insert<InstMIPS32Bc1t>(...); // new base class needed
+  //}
+
+  //void _c_le_d(...) {
+  //  Context.insert<InstMIPS32C_le_d>(...); // new base class needed
+  //}
+
+  void _cvt_d_l(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Cvt_d_l>(Dest, Src);
+  }
+
+  void _cvt_d_s(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Cvt_d_s>(Dest, Src);
+  }
+
+  void _cvt_d_w(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Cvt_d_w>(Dest, Src);
+  }
+
+  void _cvt_s_d(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Cvt_s_d>(Dest, Src);
+  }
+
+  void _cvt_s_l(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Cvt_s_l>(Dest, Src);
+  }
+
+  void _cvt_s_w(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Cvt_s_w>(Dest, Src);
+  }
+
   void _div(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Div>(Dest, Src0, Src1);
   }
 
   void _div_d(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Div_d>(Dest, Src0, Src1);
   }
 
   void _div_s(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Div_s>(Dest, Src0, Src1);
   }
 
   void _divu(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Divu>(Dest, Src0, Src1);
   }
 
+  void _ldc1(Variable *Value, OperandMIPS32Mem *Mem) {
+    Context.insert<InstMIPS32Ldc1>(Value, Mem);
+  }
+
+  void _lwc1(Variable *Value, OperandMIPS32Mem *Mem) {
+    Context.insert<InstMIPS32Lwc1>(Value, Mem);
+  }
+
   void _lui(Variable *Dest, uint32_t Imm) {
     Context.insert<InstMIPS32Lui>(Dest, Imm);
   }
 
   void _mov(Variable *Dest, Operand *Src0) {
     assert(Dest != nullptr);
     // Variable* Src0_ = llvm::dyn_cast<Variable>(Src0);
     if (llvm::isa<ConstantRelocatable>(Src0)) {
       Context.insert<InstMIPS32La>(Dest, Src0);
     } else {
@@ skipping 60 matching lines @@
   }
 
   void _or(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Or>(Dest, Src0, Src1);
   }
 
   void _ori(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert<InstMIPS32Ori>(Dest, Src, Imm);
   }
 
+  void _sdc1(Variable *Value, OperandMIPS32Mem *Mem) {
+    Context.insert<InstMIPS32Sdc1>(Value, Mem);
+  }
+
   void _sll(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert<InstMIPS32Sll>(Dest, Src, Imm);
   }
 
   void _sllv(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Sllv>(Dest, Src0, Src1);
   }
 
   void _slt(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Slt>(Dest, Src0, Src1);
@@ skipping 40 matching lines @@
   }
 
   void _subu(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Subu>(Dest, Src0, Src1);
   }
 
   void _sw(Variable *Value, OperandMIPS32Mem *Mem) {
     Context.insert<InstMIPS32Sw>(Value, Mem);
   }
 
+  void _swc1(Variable *Value, OperandMIPS32Mem *Mem) {
+    Context.insert<InstMIPS32Swc1>(Value, Mem);
+  }
+
+  void _trunc_l_d(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Trunc_l_d>(Dest, Src);
+  }
+
+  void _trunc_l_s(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Trunc_l_s>(Dest, Src);
+  }
+
+  void _trunc_w_d(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Trunc_w_d>(Dest, Src);
+  }
+
+  void _trunc_w_s(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Trunc_w_s>(Dest, Src);
+  }
+
   void _xor(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Xor>(Dest, Src0, Src1);
   }
 
   void _xori(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert<InstMIPS32Xori>(Dest, Src, Imm);
   }
 
   void lowerArguments() override;
 
@@ skipping 201 matching lines @@
   explicit TargetHeaderMIPS32(GlobalContext *Ctx);
 
 private:
   ~TargetHeaderMIPS32() = default;
 };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H