Chromium Code Reviews| OLD | NEW |
|---|---|
| 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // | 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 107 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 118 public: | 118 public: |
| 119 enum InstKindMIPS32 { | 119 enum InstKindMIPS32 { |
| 120 k__Start = Inst::Target, | 120 k__Start = Inst::Target, |
| 121 Add, | 121 Add, |
| 122 Add_d, | 122 Add_d, |
| 123 Add_s, | 123 Add_s, |
| 124 Addiu, | 124 Addiu, |
| 125 Addu, | 125 Addu, |
| 126 And, | 126 And, |
| 127 Andi, | 127 Andi, |
| 128 Bc1t, | |
| 128 Br, | 129 Br, |
| 130 C_le_d, | |
| 129 Call, | 131 Call, |
| 132 Cvt_d_l, | |
| 133 Cvt_d_s, | |
| 134 Cvt_d_w, | |
| 135 Cvt_s_d, | |
| 136 Cvt_s_l, | |
| 137 Cvt_s_w, | |
| 130 Div, | 138 Div, |
| 131 Div_d, | 139 Div_d, |
| 132 Div_s, | 140 Div_s, |
| 133 Divu, | 141 Divu, |
| 134 La, | 142 La, |
| 135 Label, | 143 Label, |
| 144 Ldc1, | |
| 136 Lui, | 145 Lui, |
| 146 Lw, | |
| 147 Lwc1, | |
| 137 Mfc1, | 148 Mfc1, |
| 138 Mfhi, | 149 Mfhi, |
| 139 Mflo, | 150 Mflo, |
| 140 Mov, // actually a pseudo op for addi rd, rs, 0 | 151 Mov, // actually a pseudo op for addi rd, rs, 0 |
| 141 Mov_d, | 152 Mov_d, |
| 142 Mov_s, | 153 Mov_s, |
| 143 Mtc1, | 154 Mtc1, |
| 144 Mthi, | 155 Mthi, |
| 145 Mtlo, | 156 Mtlo, |
| 146 Mul, | 157 Mul, |
| 147 Mul_d, | 158 Mul_d, |
| 148 Mul_s, | 159 Mul_s, |
| 149 Mult, | 160 Mult, |
| 150 Multu, | 161 Multu, |
| 151 Or, | 162 Or, |
| 152 Ori, | 163 Ori, |
| 153 Ret, | 164 Ret, |
| 165 Sdc1, | |
| 154 Sll, | 166 Sll, |
| 155 Sllv, | 167 Sllv, |
| 156 Slt, | 168 Slt, |
| 157 Slti, | 169 Slti, |
| 158 Sltiu, | 170 Sltiu, |
| 159 Sltu, | 171 Sltu, |
| 160 Sra, | 172 Sra, |
| 161 Srav, | 173 Srav, |
| 162 Srl, | 174 Srl, |
| 163 Srlv, | 175 Srlv, |
| 164 Sub, | 176 Sub, |
| 165 Sub_d, | 177 Sub_d, |
| 166 Sub_s, | 178 Sub_s, |
| 167 Subu, | 179 Subu, |
| 168 Sw, | 180 Sw, |
| 181 Swc1, | |
| 182 Trunc_l_d, | |
| 183 Trunc_l_s, | |
| 184 Trunc_w_d, | |
| 185 Trunc_w_s, | |
| 169 Xor, | 186 Xor, |
| 170 Xori | 187 Xori |
| 171 }; | 188 }; |
| 172 | 189 |
| 173 static const char *getWidthString(Type Ty); | 190 static const char *getWidthString(Type Ty); |
| 174 | 191 |
| 175 void dump(const Cfg *Func) const override; | 192 void dump(const Cfg *Func) const override; |
| 176 | 193 |
| 177 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const { | 194 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const { |
| 178 Str << Opcode << "." << Ty; | 195 Str << Opcode << "." << Ty; |
| (...skipping 522 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 701 const uint32_t Imm; | 718 const uint32_t Imm; |
| 702 }; | 719 }; |
| 703 | 720 |
| 704 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; | 721 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; |
| 705 using InstMIPS32Add_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_d>; | 722 using InstMIPS32Add_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_d>; |
| 706 using InstMIPS32Add_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_s>; | 723 using InstMIPS32Add_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_s>; |
| 707 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>; | 724 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>; |
| 708 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; | 725 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; |
| 709 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; | 726 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; |
| 710 using InstMIPS32Andi = InstMIPS32Imm16<InstMIPS32::Andi>; | 727 using InstMIPS32Andi = InstMIPS32Imm16<InstMIPS32::Andi>; |
| 728 //using InstMIPS32Bc1t = InstMIPS32ThreeAddrFPR<InstMIPS32::Bc1t>; // new base c lass needed | |
|
John
2016/06/01 15:01:05
80-col
obucinac
2016/06/01 16:38:09
Removed for now.
| |
| 729 //using InstMIPS32C_le_d = InstMIPS32ThreeAddrFPR<InstMIPS32::C_le_d>; // new ba se class needed | |
|
John
2016/06/01 15:01:05
80-col
obucinac
2016/06/01 16:38:10
Removed for now.
| |
| 730 using InstMIPS32Cvt_d_s = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_s>; | |
| 731 using InstMIPS32Cvt_d_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_l>; | |
| 732 using InstMIPS32Cvt_d_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_w>; | |
| 733 using InstMIPS32Cvt_s_d = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_d>; | |
| 734 using InstMIPS32Cvt_s_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_l>; | |
| 735 using InstMIPS32Cvt_s_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_w>; | |
| 711 using InstMIPS32Div = InstMIPS32ThreeAddrGPR<InstMIPS32::Div>; | 736 using InstMIPS32Div = InstMIPS32ThreeAddrGPR<InstMIPS32::Div>; |
| 712 using InstMIPS32Div_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_d>; | 737 using InstMIPS32Div_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_d>; |
| 713 using InstMIPS32Div_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_s>; | 738 using InstMIPS32Div_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_s>; |
| 714 using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>; | 739 using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>; |
| 740 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; | |
| 741 using InstMIPS32Ldc1 = InstMIPS32Memory<InstMIPS32::Ldc1>; | |
| 715 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; | 742 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; |
| 716 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; | 743 using InstMIPS32Lw = InstMIPS32Memory<InstMIPS32::Lwc1>; |
| 744 using InstMIPS32Lwc1 = InstMIPS32Memory<InstMIPS32::Lwc1>; | |
| 717 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>; | 745 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>; |
| 718 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>; | 746 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>; |
| 719 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>; | 747 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>; |
| 720 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>; | 748 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>; |
| 721 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>; | 749 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>; |
| 722 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>; | 750 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>; |
| 723 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; | 751 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; |
| 724 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; | 752 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; |
| 725 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; | 753 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; |
| 726 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>; | 754 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>; |
| 727 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>; | 755 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>; |
| 728 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; | 756 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; |
| 729 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; | 757 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; |
| 730 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; | 758 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; |
| 731 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | 759 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; |
| 760 using InstMIPS32Sdc1 = InstMIPS32Memory<InstMIPS32::Sdc1>; | |
| 732 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>; | 761 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>; |
| 733 using InstMIPS32Sllv = InstMIPS32ThreeAddrGPR<InstMIPS32::Sllv>; | 762 using InstMIPS32Sllv = InstMIPS32ThreeAddrGPR<InstMIPS32::Sllv>; |
| 734 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>; | 763 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>; |
| 735 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>; | 764 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>; |
| 736 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>; | 765 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>; |
| 737 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; | 766 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; |
| 738 using InstMIPS32Sra = InstMIPS32Imm16<InstMIPS32::Sra>; | 767 using InstMIPS32Sra = InstMIPS32Imm16<InstMIPS32::Sra>; |
| 739 using InstMIPS32Srav = InstMIPS32ThreeAddrGPR<InstMIPS32::Srav>; | 768 using InstMIPS32Srav = InstMIPS32ThreeAddrGPR<InstMIPS32::Srav>; |
| 740 using InstMIPS32Srl = InstMIPS32Imm16<InstMIPS32::Srl>; | 769 using InstMIPS32Srl = InstMIPS32Imm16<InstMIPS32::Srl>; |
| 741 using InstMIPS32Srlv = InstMIPS32ThreeAddrGPR<InstMIPS32::Srlv>; | 770 using InstMIPS32Srlv = InstMIPS32ThreeAddrGPR<InstMIPS32::Srlv>; |
| 742 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; | 771 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; |
| 743 using InstMIPS32Sub_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Sub_d>; | 772 using InstMIPS32Sub_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Sub_d>; |
| 744 using InstMIPS32Sub_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Sub_s>; | 773 using InstMIPS32Sub_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Sub_s>; |
| 745 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>; | 774 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>; |
| 746 using InstMIPS32Sw = InstMIPS32Memory<InstMIPS32::Sw>; | 775 using InstMIPS32Sw = InstMIPS32Memory<InstMIPS32::Sw>; |
| 776 using InstMIPS32Swc1 = InstMIPS32Memory<InstMIPS32::Swc1>; | |
| 777 using InstMIPS32Trunc_l_d = InstMIPS32TwoAddrFPR<InstMIPS32::Trunc_l_d>; | |
| 778 using InstMIPS32Trunc_l_s = InstMIPS32TwoAddrFPR<InstMIPS32::Trunc_l_s>; | |
| 779 using InstMIPS32Trunc_w_d = InstMIPS32TwoAddrFPR<InstMIPS32::Trunc_w_d>; | |
| 780 using InstMIPS32Trunc_w_s = InstMIPS32TwoAddrFPR<InstMIPS32::Trunc_w_s>; | |
| 747 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | 781 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; |
| 748 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; | 782 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; |
| 749 using InstMIPS32Xori = InstMIPS32Imm16<InstMIPS32::Xori>; | 783 using InstMIPS32Xori = InstMIPS32Imm16<InstMIPS32::Xori>; |
| 750 | 784 |
| 751 /// Handles (some of) vmov's various formats. | 785 /// Handles (some of) vmov's various formats. |
| 752 class InstMIPS32Mov final : public InstMIPS32 { | 786 class InstMIPS32Mov final : public InstMIPS32 { |
| 753 InstMIPS32Mov() = delete; | 787 InstMIPS32Mov() = delete; |
| 754 InstMIPS32Mov(const InstMIPS32Mov &) = delete; | 788 InstMIPS32Mov(const InstMIPS32Mov &) = delete; |
| 755 InstMIPS32Mov &operator=(const InstMIPS32Mov &) = delete; | 789 InstMIPS32Mov &operator=(const InstMIPS32Mov &) = delete; |
| 756 | 790 |
| (...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 795 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const; | 829 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const; |
| 796 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; | 830 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; |
| 797 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; | 831 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; |
| 798 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; | 832 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; |
| 799 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; | 833 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; |
| 800 | 834 |
| 801 } // end of namespace MIPS32 | 835 } // end of namespace MIPS32 |
| 802 } // end of namespace Ice | 836 } // end of namespace Ice |
| 803 | 837 |
| 804 #endif // SUBZERO_SRC_ICEINSTMIPS32_H | 838 #endif // SUBZERO_SRC_ICEINSTMIPS32_H |
| OLD | NEW |