Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(156)

Side by Side Diff: src/mips/assembler-mips-inl.h

Issue 2021323003: [wasm] remove faux code objects Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 6 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/mips/assembler-mips.cc ('k') | src/mips64/assembler-mips64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 1
2 // Copyright (c) 1994-2006 Sun Microsystems Inc. 2 // Copyright (c) 1994-2006 Sun Microsystems Inc.
3 // All Rights Reserved. 3 // All Rights Reserved.
4 // 4 //
5 // Redistribution and use in source and binary forms, with or without 5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are 6 // modification, are permitted provided that the following conditions are
7 // met: 7 // met:
8 // 8 //
9 // - Redistributions of source code must retain the above copyright notice, 9 // - Redistributions of source code must retain the above copyright notice,
10 // this list of conditions and the following disclaimer. 10 // this list of conditions and the following disclaimer.
(...skipping 122 matching lines...) Expand 10 before | Expand all | Expand 10 after
133 133
134 134
135 int RelocInfo::target_address_size() { 135 int RelocInfo::target_address_size() {
136 return Assembler::kSpecialTargetSize; 136 return Assembler::kSpecialTargetSize;
137 } 137 }
138 138
139 139
140 void RelocInfo::set_target_address(Address target, 140 void RelocInfo::set_target_address(Address target,
141 WriteBarrierMode write_barrier_mode, 141 WriteBarrierMode write_barrier_mode,
142 ICacheFlushMode icache_flush_mode) { 142 ICacheFlushMode icache_flush_mode) {
143 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)); 143 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) || IsWasmCall(rmode_));
144 Assembler::set_target_address_at(isolate_, pc_, host_, target, 144 Assembler::set_target_address_at(isolate_, pc_, host_, target,
145 icache_flush_mode); 145 icache_flush_mode);
146 if (write_barrier_mode == UPDATE_WRITE_BARRIER && 146 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
147 host() != NULL && IsCodeTarget(rmode_)) { 147 host() != NULL && IsCodeTarget(rmode_)) {
148 Object* target_code = Code::GetCodeFromTargetAddress(target); 148 Object* target_code = Code::GetCodeFromTargetAddress(target);
149 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( 149 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
150 host(), this, HeapObject::cast(target_code)); 150 host(), this, HeapObject::cast(target_code));
151 } 151 }
152 } 152 }
153 153
(...skipping 333 matching lines...) Expand 10 before | Expand all | Expand 10 after
487 CheckBuffer(); 487 CheckBuffer();
488 } 488 }
489 EmitHelper(x, is_compact_branch); 489 EmitHelper(x, is_compact_branch);
490 } 490 }
491 491
492 492
493 } // namespace internal 493 } // namespace internal
494 } // namespace v8 494 } // namespace v8
495 495
496 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ 496 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_
OLDNEW
« no previous file with comments | « src/mips/assembler-mips.cc ('k') | src/mips64/assembler-mips64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698