[Subzero][MIPS32] Add argument handling in LowerCall

src/IceRegistersMIPS32.h

Index: src/IceRegistersMIPS32.h
diff --git a/src/IceRegistersMIPS32.h b/src/IceRegistersMIPS32.h
index f6ea38e312b5b65537cbc20c7acff76456ddf1b7..d515543bf4a214617a91cedd275e664ccb535351 100644
--- a/src/IceRegistersMIPS32.h
+++ b/src/IceRegistersMIPS32.h
@@ -89,6 +89,16 @@ static inline bool isFPRReg(RegNumT RegNum) {
 
 const char *getRegName(RegNumT RegNum);
 
+static inline RegNumT getI64PairFirstGPRNum(RegNumT RegNum) {
+  RegNum.assertIsValid();
+  return (RegNum == RegNumT::fixme(RegMIPS32::Reg_A0A1)) ? RegMIPS32::Reg_A0 : RegMIPS32::Reg_A2;

[Jim Stichnoth, 2016/05/31 16:37:45]

This seems fine as long as RegNum is A0A1 or A2A3, but not for V0V1, T0T1, T2T3,
etc.  Same comment below.

+}
+
+static inline RegNumT getI64PairSecondGPRNum(RegNumT RegNum) {
+  RegNum.assertIsValid();
+  return (RegNum == RegNumT::fixme(RegMIPS32::Reg_A0A1)) ? RegMIPS32::Reg_A1 : RegMIPS32::Reg_A3;

[Jim Stichnoth, 2016/05/31 16:37:45]

80-col
(run "make -f Makefile.standalone format" to fix automatically)

+}
+
 } // end of namespace RegMIPS32
 
 // Extend enum RegClass with MIPS32-specific register classes (if any).