| OLD | NEW |
| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
| (...skipping 3056 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 3067 | 3067 |
| 3068 void MacroAssembler::ClampDoubleToUint8(XMMRegister input_reg, | 3068 void MacroAssembler::ClampDoubleToUint8(XMMRegister input_reg, |
| 3069 XMMRegister temp_xmm_reg, | 3069 XMMRegister temp_xmm_reg, |
| 3070 Register result_reg) { | 3070 Register result_reg) { |
| 3071 Label done; | 3071 Label done; |
| 3072 Label conv_failure; | 3072 Label conv_failure; |
| 3073 xorps(temp_xmm_reg, temp_xmm_reg); | 3073 xorps(temp_xmm_reg, temp_xmm_reg); |
| 3074 cvtsd2si(result_reg, input_reg); | 3074 cvtsd2si(result_reg, input_reg); |
| 3075 testl(result_reg, Immediate(0xFFFFFF00)); | 3075 testl(result_reg, Immediate(0xFFFFFF00)); |
| 3076 j(zero, &done, Label::kNear); | 3076 j(zero, &done, Label::kNear); |
| 3077 cmpl(result_reg, Immediate(0x80000000)); | 3077 cmpl(result_reg, Immediate(1)); |
| 3078 j(equal, &conv_failure, Label::kNear); | 3078 j(overflow, &conv_failure, Label::kNear); |
| 3079 movl(result_reg, Immediate(0)); | 3079 movl(result_reg, Immediate(0)); |
| 3080 setcc(above, result_reg); | 3080 setcc(sign, result_reg); |
| 3081 subl(result_reg, Immediate(1)); | 3081 subl(result_reg, Immediate(1)); |
| 3082 andl(result_reg, Immediate(255)); | 3082 andl(result_reg, Immediate(255)); |
| 3083 jmp(&done, Label::kNear); | 3083 jmp(&done, Label::kNear); |
| 3084 bind(&conv_failure); | 3084 bind(&conv_failure); |
| 3085 Set(result_reg, 0); | 3085 Set(result_reg, 0); |
| 3086 ucomisd(input_reg, temp_xmm_reg); | 3086 ucomisd(input_reg, temp_xmm_reg); |
| 3087 j(below, &done, Label::kNear); | 3087 j(below, &done, Label::kNear); |
| 3088 Set(result_reg, 255); | 3088 Set(result_reg, 255); |
| 3089 bind(&done); | 3089 bind(&done); |
| 3090 } | 3090 } |
| (...skipping 16 matching lines...) Expand all Loading... |
| 3107 DoubleToIStub stub(input_reg, result_reg, offset, true); | 3107 DoubleToIStub stub(input_reg, result_reg, offset, true); |
| 3108 call(stub.GetCode(isolate()), RelocInfo::CODE_TARGET); | 3108 call(stub.GetCode(isolate()), RelocInfo::CODE_TARGET); |
| 3109 } | 3109 } |
| 3110 | 3110 |
| 3111 | 3111 |
| 3112 void MacroAssembler::TruncateHeapNumberToI(Register result_reg, | 3112 void MacroAssembler::TruncateHeapNumberToI(Register result_reg, |
| 3113 Register input_reg) { | 3113 Register input_reg) { |
| 3114 Label done; | 3114 Label done; |
| 3115 movsd(xmm0, FieldOperand(input_reg, HeapNumber::kValueOffset)); | 3115 movsd(xmm0, FieldOperand(input_reg, HeapNumber::kValueOffset)); |
| 3116 cvttsd2siq(result_reg, xmm0); | 3116 cvttsd2siq(result_reg, xmm0); |
| 3117 Set(kScratchRegister, V8_UINT64_C(0x8000000000000000)); | 3117 cmpq(result_reg, Immediate(1)); |
| 3118 cmpq(result_reg, kScratchRegister); | 3118 j(no_overflow, &done, Label::kNear); |
| 3119 j(not_equal, &done, Label::kNear); | |
| 3120 | 3119 |
| 3121 // Slow case. | 3120 // Slow case. |
| 3122 if (input_reg.is(result_reg)) { | 3121 if (input_reg.is(result_reg)) { |
| 3123 subq(rsp, Immediate(kDoubleSize)); | 3122 subq(rsp, Immediate(kDoubleSize)); |
| 3124 movsd(MemOperand(rsp, 0), xmm0); | 3123 movsd(MemOperand(rsp, 0), xmm0); |
| 3125 SlowTruncateToI(result_reg, rsp, 0); | 3124 SlowTruncateToI(result_reg, rsp, 0); |
| 3126 addq(rsp, Immediate(kDoubleSize)); | 3125 addq(rsp, Immediate(kDoubleSize)); |
| 3127 } else { | 3126 } else { |
| 3128 SlowTruncateToI(result_reg, input_reg); | 3127 SlowTruncateToI(result_reg, input_reg); |
| 3129 } | 3128 } |
| 3130 | 3129 |
| 3131 bind(&done); | 3130 bind(&done); |
| 3132 } | 3131 } |
| 3133 | 3132 |
| 3134 | 3133 |
| 3135 void MacroAssembler::TruncateDoubleToI(Register result_reg, | 3134 void MacroAssembler::TruncateDoubleToI(Register result_reg, |
| 3136 XMMRegister input_reg) { | 3135 XMMRegister input_reg) { |
| 3137 Label done; | 3136 Label done; |
| 3138 cvttsd2siq(result_reg, input_reg); | 3137 cvttsd2siq(result_reg, input_reg); |
| 3139 movq(kScratchRegister, V8_INT64_C(0x8000000000000000)); | 3138 cmpq(result_reg, Immediate(1)); |
| 3140 cmpq(result_reg, kScratchRegister); | 3139 j(no_overflow, &done, Label::kNear); |
| 3141 j(not_equal, &done, Label::kNear); | |
| 3142 | 3140 |
| 3143 subq(rsp, Immediate(kDoubleSize)); | 3141 subq(rsp, Immediate(kDoubleSize)); |
| 3144 movsd(MemOperand(rsp, 0), input_reg); | 3142 movsd(MemOperand(rsp, 0), input_reg); |
| 3145 SlowTruncateToI(result_reg, rsp, 0); | 3143 SlowTruncateToI(result_reg, rsp, 0); |
| 3146 addq(rsp, Immediate(kDoubleSize)); | 3144 addq(rsp, Immediate(kDoubleSize)); |
| 3147 | 3145 |
| 3148 bind(&done); | 3146 bind(&done); |
| 3149 } | 3147 } |
| 3150 | 3148 |
| 3151 | 3149 |
| (...skipping 1835 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 4987 imull(dividend); | 4985 imull(dividend); |
| 4988 if (divisor > 0 && ms.multiplier() < 0) addl(rdx, dividend); | 4986 if (divisor > 0 && ms.multiplier() < 0) addl(rdx, dividend); |
| 4989 if (divisor < 0 && ms.multiplier() > 0) subl(rdx, dividend); | 4987 if (divisor < 0 && ms.multiplier() > 0) subl(rdx, dividend); |
| 4990 if (ms.shift() > 0) sarl(rdx, Immediate(ms.shift())); | 4988 if (ms.shift() > 0) sarl(rdx, Immediate(ms.shift())); |
| 4991 } | 4989 } |
| 4992 | 4990 |
| 4993 | 4991 |
| 4994 } } // namespace v8::internal | 4992 } } // namespace v8::internal |
| 4995 | 4993 |
| 4996 #endif // V8_TARGET_ARCH_X64 | 4994 #endif // V8_TARGET_ARCH_X64 |
| OLD | NEW |