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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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207 bind(&done); | 207 bind(&done); |
208 } | 208 } |
209 } | 209 } |
210 | 210 |
211 | 211 |
212 void MacroAssembler::ClampDoubleToUint8(XMMRegister input_reg, | 212 void MacroAssembler::ClampDoubleToUint8(XMMRegister input_reg, |
213 XMMRegister scratch_reg, | 213 XMMRegister scratch_reg, |
214 Register result_reg) { | 214 Register result_reg) { |
215 Label done; | 215 Label done; |
216 Label conv_failure; | 216 Label conv_failure; |
217 pxor(scratch_reg, scratch_reg); | 217 xorps(scratch_reg, scratch_reg); |
218 cvtsd2si(result_reg, input_reg); | 218 cvtsd2si(result_reg, input_reg); |
219 test(result_reg, Immediate(0xFFFFFF00)); | 219 test(result_reg, Immediate(0xFFFFFF00)); |
220 j(zero, &done, Label::kNear); | 220 j(zero, &done, Label::kNear); |
221 cmp(result_reg, Immediate(0x80000000)); | 221 cmp(result_reg, Immediate(0x1)); |
222 j(equal, &conv_failure, Label::kNear); | 222 j(overflow, &conv_failure, Label::kNear); |
223 mov(result_reg, Immediate(0)); | 223 mov(result_reg, Immediate(0)); |
224 setcc(above, result_reg); | 224 setcc(sign, result_reg); |
225 sub(result_reg, Immediate(1)); | 225 sub(result_reg, Immediate(1)); |
226 and_(result_reg, Immediate(255)); | 226 and_(result_reg, Immediate(255)); |
227 jmp(&done, Label::kNear); | 227 jmp(&done, Label::kNear); |
228 bind(&conv_failure); | 228 bind(&conv_failure); |
229 Set(result_reg, Immediate(0)); | 229 Set(result_reg, Immediate(0)); |
230 ucomisd(input_reg, scratch_reg); | 230 ucomisd(input_reg, scratch_reg); |
231 j(below, &done, Label::kNear); | 231 j(below, &done, Label::kNear); |
232 Set(result_reg, Immediate(255)); | 232 Set(result_reg, Immediate(255)); |
233 bind(&done); | 233 bind(&done); |
234 } | 234 } |
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249 int offset) { | 249 int offset) { |
250 DoubleToIStub stub(input_reg, result_reg, offset, true); | 250 DoubleToIStub stub(input_reg, result_reg, offset, true); |
251 call(stub.GetCode(isolate()), RelocInfo::CODE_TARGET); | 251 call(stub.GetCode(isolate()), RelocInfo::CODE_TARGET); |
252 } | 252 } |
253 | 253 |
254 | 254 |
255 void MacroAssembler::TruncateDoubleToI(Register result_reg, | 255 void MacroAssembler::TruncateDoubleToI(Register result_reg, |
256 XMMRegister input_reg) { | 256 XMMRegister input_reg) { |
257 Label done; | 257 Label done; |
258 cvttsd2si(result_reg, Operand(input_reg)); | 258 cvttsd2si(result_reg, Operand(input_reg)); |
259 cmp(result_reg, 0x80000000u); | 259 cmp(result_reg, 0x1); |
260 j(not_equal, &done, Label::kNear); | 260 j(no_overflow, &done, Label::kNear); |
261 | 261 |
262 sub(esp, Immediate(kDoubleSize)); | 262 sub(esp, Immediate(kDoubleSize)); |
263 movsd(MemOperand(esp, 0), input_reg); | 263 movsd(MemOperand(esp, 0), input_reg); |
264 SlowTruncateToI(result_reg, esp, 0); | 264 SlowTruncateToI(result_reg, esp, 0); |
265 add(esp, Immediate(kDoubleSize)); | 265 add(esp, Immediate(kDoubleSize)); |
266 bind(&done); | 266 bind(&done); |
267 } | 267 } |
268 | 268 |
269 | 269 |
270 void MacroAssembler::TruncateX87TOSToI(Register result_reg) { | 270 void MacroAssembler::TruncateX87TOSToI(Register result_reg) { |
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367 SlowTruncateToI(result_reg, esp, 0); | 367 SlowTruncateToI(result_reg, esp, 0); |
368 add(esp, Immediate(kDoubleSize)); | 368 add(esp, Immediate(kDoubleSize)); |
369 } else { | 369 } else { |
370 fstp(0); | 370 fstp(0); |
371 SlowTruncateToI(result_reg, input_reg); | 371 SlowTruncateToI(result_reg, input_reg); |
372 } | 372 } |
373 } else if (CpuFeatures::IsSupported(SSE2)) { | 373 } else if (CpuFeatures::IsSupported(SSE2)) { |
374 CpuFeatureScope scope(this, SSE2); | 374 CpuFeatureScope scope(this, SSE2); |
375 movsd(xmm0, FieldOperand(input_reg, HeapNumber::kValueOffset)); | 375 movsd(xmm0, FieldOperand(input_reg, HeapNumber::kValueOffset)); |
376 cvttsd2si(result_reg, Operand(xmm0)); | 376 cvttsd2si(result_reg, Operand(xmm0)); |
377 cmp(result_reg, 0x80000000u); | 377 cmp(result_reg, 0x1); |
378 j(not_equal, &done, Label::kNear); | 378 j(no_overflow, &done, Label::kNear); |
379 // Check if the input was 0x8000000 (kMinInt). | 379 // Check if the input was 0x8000000 (kMinInt). |
380 // If no, then we got an overflow and we deoptimize. | 380 // If no, then we got an overflow and we deoptimize. |
381 ExternalReference min_int = ExternalReference::address_of_min_int(); | 381 ExternalReference min_int = ExternalReference::address_of_min_int(); |
382 ucomisd(xmm0, Operand::StaticVariable(min_int)); | 382 ucomisd(xmm0, Operand::StaticVariable(min_int)); |
383 j(not_equal, &slow_case, Label::kNear); | 383 j(not_equal, &slow_case, Label::kNear); |
384 j(parity_even, &slow_case, Label::kNear); // NaN. | 384 j(parity_even, &slow_case, Label::kNear); // NaN. |
385 jmp(&done, Label::kNear); | 385 jmp(&done, Label::kNear); |
386 | 386 |
387 // Slow case. | 387 // Slow case. |
388 bind(&slow_case); | 388 bind(&slow_case); |
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3621 imul(dividend); | 3621 imul(dividend); |
3622 if (divisor > 0 && ms.multiplier() < 0) add(edx, dividend); | 3622 if (divisor > 0 && ms.multiplier() < 0) add(edx, dividend); |
3623 if (divisor < 0 && ms.multiplier() > 0) sub(edx, dividend); | 3623 if (divisor < 0 && ms.multiplier() > 0) sub(edx, dividend); |
3624 if (ms.shift() > 0) sar(edx, ms.shift()); | 3624 if (ms.shift() > 0) sar(edx, ms.shift()); |
3625 } | 3625 } |
3626 | 3626 |
3627 | 3627 |
3628 } } // namespace v8::internal | 3628 } } // namespace v8::internal |
3629 | 3629 |
3630 #endif // V8_TARGET_ARCH_IA32 | 3630 #endif // V8_TARGET_ARCH_IA32 |
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