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Side by Side Diff: src/compiler/mips64/code-generator-mips64.cc

Issue 2019693002: MIPS: Fix '[turbofan] Introduce new operators Float32SubPreserveNan and Float64SubPreserveNan'. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix instruction selector mips64. Created 4 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
(...skipping 1087 matching lines...) Expand 10 before | Expand all | Expand 10 after
1098 break; 1098 break;
1099 case kMips64AddS: 1099 case kMips64AddS:
1100 // TODO(plind): add special case: combine mult & add. 1100 // TODO(plind): add special case: combine mult & add.
1101 __ add_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1101 __ add_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1102 i.InputDoubleRegister(1)); 1102 i.InputDoubleRegister(1));
1103 break; 1103 break;
1104 case kMips64SubS: 1104 case kMips64SubS:
1105 __ sub_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1105 __ sub_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1106 i.InputDoubleRegister(1)); 1106 i.InputDoubleRegister(1));
1107 break; 1107 break;
1108 case kMips64SubPreserveNanS:
1109 __ SubNanPreservePayloadAndSign_s(i.OutputDoubleRegister(),
1110 i.InputDoubleRegister(0),
1111 i.InputDoubleRegister(1));
1112 break;
1108 case kMips64MulS: 1113 case kMips64MulS:
1109 // TODO(plind): add special case: right op is -1.0, see arm port. 1114 // TODO(plind): add special case: right op is -1.0, see arm port.
1110 __ mul_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1115 __ mul_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1111 i.InputDoubleRegister(1)); 1116 i.InputDoubleRegister(1));
1112 break; 1117 break;
1113 case kMips64DivS: 1118 case kMips64DivS:
1114 __ div_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1119 __ div_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1115 i.InputDoubleRegister(1)); 1120 i.InputDoubleRegister(1));
1116 break; 1121 break;
1117 case kMips64ModS: { 1122 case kMips64ModS: {
(...skipping 30 matching lines...) Expand all
1148 break; 1153 break;
1149 case kMips64AddD: 1154 case kMips64AddD:
1150 // TODO(plind): add special case: combine mult & add. 1155 // TODO(plind): add special case: combine mult & add.
1151 __ add_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1156 __ add_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1152 i.InputDoubleRegister(1)); 1157 i.InputDoubleRegister(1));
1153 break; 1158 break;
1154 case kMips64SubD: 1159 case kMips64SubD:
1155 __ sub_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1160 __ sub_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1156 i.InputDoubleRegister(1)); 1161 i.InputDoubleRegister(1));
1157 break; 1162 break;
1163 case kMips64SubPreserveNanD:
1164 __ SubNanPreservePayloadAndSign_d(i.OutputDoubleRegister(),
1165 i.InputDoubleRegister(0),
1166 i.InputDoubleRegister(1));
1167 break;
1158 case kMips64MulD: 1168 case kMips64MulD:
1159 // TODO(plind): add special case: right op is -1.0, see arm port. 1169 // TODO(plind): add special case: right op is -1.0, see arm port.
1160 __ mul_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1170 __ mul_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1161 i.InputDoubleRegister(1)); 1171 i.InputDoubleRegister(1));
1162 break; 1172 break;
1163 case kMips64DivD: 1173 case kMips64DivD:
1164 __ div_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1174 __ div_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1165 i.InputDoubleRegister(1)); 1175 i.InputDoubleRegister(1));
1166 break; 1176 break;
1167 case kMips64ModD: { 1177 case kMips64ModD: {
(...skipping 1082 matching lines...) Expand 10 before | Expand all | Expand 10 after
2250 padding_size -= v8::internal::Assembler::kInstrSize; 2260 padding_size -= v8::internal::Assembler::kInstrSize;
2251 } 2261 }
2252 } 2262 }
2253 } 2263 }
2254 2264
2255 #undef __ 2265 #undef __
2256 2266
2257 } // namespace compiler 2267 } // namespace compiler
2258 } // namespace internal 2268 } // namespace internal
2259 } // namespace v8 2269 } // namespace v8
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