Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(138)

Side by Side Diff: src/a64/disasm-a64.cc

Issue 201843003: Robustified address calculations on A64. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Feedback. Rebased. Created 6 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | src/a64/instructions-a64.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 1589 matching lines...) Expand 10 before | Expand all | Expand 10 after
1600 int offset = instr->ImmPCRel(); 1600 int offset = instr->ImmPCRel();
1601 1601
1602 // Only ADR (AddrPCRelByte) is supported. 1602 // Only ADR (AddrPCRelByte) is supported.
1603 ASSERT(strcmp(format, "AddrPCRelByte") == 0); 1603 ASSERT(strcmp(format, "AddrPCRelByte") == 0);
1604 1604
1605 char sign = '+'; 1605 char sign = '+';
1606 if (offset < 0) { 1606 if (offset < 0) {
1607 offset = -offset; 1607 offset = -offset;
1608 sign = '-'; 1608 sign = '-';
1609 } 1609 }
1610 STATIC_ASSERT(sizeof(*instr) == 1); 1610 AppendToOutput("#%c0x%x (addr %p)", sign, offset,
1611 AppendToOutput("#%c0x%x (addr %p)", sign, offset, instr + offset); 1611 instr->InstructionAtOffset(offset, Instruction::NO_CHECK));
1612 return 13; 1612 return 13;
1613 } 1613 }
1614 1614
1615 1615
1616 int Disassembler::SubstituteBranchTargetField(Instruction* instr, 1616 int Disassembler::SubstituteBranchTargetField(Instruction* instr,
1617 const char* format) { 1617 const char* format) {
1618 ASSERT(strncmp(format, "BImm", 4) == 0); 1618 ASSERT(strncmp(format, "BImm", 4) == 0);
1619 1619
1620 int64_t offset = 0; 1620 int64_t offset = 0;
1621 switch (format[5]) { 1621 switch (format[5]) {
1622 // BImmUncn - unconditional branch immediate. 1622 // BImmUncn - unconditional branch immediate.
1623 case 'n': offset = instr->ImmUncondBranch(); break; 1623 case 'n': offset = instr->ImmUncondBranch(); break;
1624 // BImmCond - conditional branch immediate. 1624 // BImmCond - conditional branch immediate.
1625 case 'o': offset = instr->ImmCondBranch(); break; 1625 case 'o': offset = instr->ImmCondBranch(); break;
1626 // BImmCmpa - compare and branch immediate. 1626 // BImmCmpa - compare and branch immediate.
1627 case 'm': offset = instr->ImmCmpBranch(); break; 1627 case 'm': offset = instr->ImmCmpBranch(); break;
1628 // BImmTest - test and branch immediate. 1628 // BImmTest - test and branch immediate.
1629 case 'e': offset = instr->ImmTestBranch(); break; 1629 case 'e': offset = instr->ImmTestBranch(); break;
1630 default: UNREACHABLE(); 1630 default: UNREACHABLE();
1631 } 1631 }
1632 offset <<= kInstructionSizeLog2; 1632 offset <<= kInstructionSizeLog2;
1633 char sign = '+'; 1633 char sign = '+';
1634 if (offset < 0) { 1634 if (offset < 0) {
1635 offset = -offset; 1635 offset = -offset;
1636 sign = '-'; 1636 sign = '-';
1637 } 1637 }
1638 STATIC_ASSERT(sizeof(*instr) == 1); 1638 AppendToOutput("#%c0x%" PRIx64 " (addr %p)", sign, offset,
1639 AppendToOutput("#%c0x%" PRIx64 " (addr %p)", sign, offset, instr + offset); 1639 instr->InstructionAtOffset(offset), Instruction::NO_CHECK);
1640 return 8; 1640 return 8;
1641 } 1641 }
1642 1642
1643 1643
1644 int Disassembler::SubstituteExtendField(Instruction* instr, 1644 int Disassembler::SubstituteExtendField(Instruction* instr,
1645 const char* format) { 1645 const char* format) {
1646 ASSERT(strncmp(format, "Ext", 3) == 0); 1646 ASSERT(strncmp(format, "Ext", 3) == 0);
1647 ASSERT(instr->ExtendMode() <= 7); 1647 ASSERT(instr->ExtendMode() <= 7);
1648 USE(format); 1648 USE(format);
1649 1649
(...skipping 197 matching lines...) Expand 10 before | Expand all | Expand 10 after
1847 decoder.AppendVisitor(&disasm); 1847 decoder.AppendVisitor(&disasm);
1848 1848
1849 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) { 1849 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) {
1850 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc)); 1850 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc));
1851 } 1851 }
1852 } 1852 }
1853 1853
1854 } // namespace disasm 1854 } // namespace disasm
1855 1855
1856 #endif // V8_TARGET_ARCH_A64 1856 #endif // V8_TARGET_ARCH_A64
OLDNEW
« no previous file with comments | « no previous file | src/a64/instructions-a64.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698