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Issue 2006183004: Implement ldrex and strex in ARM simulator (Closed) Base URL: http://chromium.googlesource.com/v8/v8.git@master
Patch Set: Lock on reads Created 3 years, 11 months ago
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1 // Copyright 2016 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are
4 // met:
5 //
6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided
11 // with the distribution.
12 // * Neither the name of Google Inc. nor the names of its
13 // contributors may be used to endorse or promote products derived
14 // from this software without specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
28 #include "src/v8.h"
29 #include "test/cctest/cctest.h"
30
31 #include "src/arm/simulator-arm.h"
32 #include "src/disassembler.h"
33 #include "src/factory.h"
34 #include "src/macro-assembler.h"
35
36 #if defined(USE_SIMULATOR)
37
38 #ifndef V8_TARGET_LITTLE_ENDIAN
39 #error Expected ARM to be little-endian
40 #endif
41
42 using namespace v8::base;
43 using namespace v8::internal;
44
45 // Define these function prototypes to match JSEntryFunction in execution.cc.
46 typedef Object* (*F1)(int x, int p1, int p2, int p3, int p4);
47 typedef Object* (*F3)(void* p0, int p1, int p2, int p3, int p4);
48
49 #define __ assm.
50
51 struct MemoryAccess {
52 enum class Kind {
53 None,
54 Load,
55 LoadExcl,
56 Store,
57 StoreExcl,
58 };
59
60 enum class Size {
61 Byte,
62 HalfWord,
63 Word,
64 };
65
66 MemoryAccess() : kind(Kind::None) {}
67 MemoryAccess(Kind kind, Size size, size_t offset, int value = 0)
68 : kind(kind), size(size), offset(offset), value(value) {}
69
70 Kind kind;
71 Size size;
72 size_t offset;
73 int value;
74 };
75
76 struct TestData {
77 explicit TestData(int w) : w(w) {}
78
79 union {
80 int32_t w;
81 int16_t h;
82 int8_t b;
83 };
84 int dummy;
85 };
86
87 static void AssembleMemoryAccess(Assembler* assembler, MemoryAccess access,
88 Register dest_reg, Register value_reg,
89 Register addr_reg) {
90 Assembler& assm = *assembler;
91 __ add(addr_reg, r0, Operand(access.offset));
92
93 switch (access.kind) {
94 case MemoryAccess::Kind::None:
95 break;
96
97 case MemoryAccess::Kind::Load:
98 switch (access.size) {
99 case MemoryAccess::Size::Byte:
100 __ ldrb(value_reg, MemOperand(addr_reg));
101 break;
102
103 case MemoryAccess::Size::HalfWord:
104 __ ldrh(value_reg, MemOperand(addr_reg));
105 break;
106
107 case MemoryAccess::Size::Word:
108 __ ldr(value_reg, MemOperand(addr_reg));
109 break;
110 }
111 break;
112
113 case MemoryAccess::Kind::LoadExcl:
114 switch (access.size) {
115 case MemoryAccess::Size::Byte:
116 __ ldrexb(value_reg, addr_reg);
117 break;
118
119 case MemoryAccess::Size::HalfWord:
120 __ ldrexh(value_reg, addr_reg);
121 break;
122
123 case MemoryAccess::Size::Word:
124 __ ldrex(value_reg, addr_reg);
125 break;
126 }
127 break;
128
129 case MemoryAccess::Kind::Store:
130 switch (access.size) {
131 case MemoryAccess::Size::Byte:
132 __ mov(value_reg, Operand(access.value));
133 __ strb(value_reg, MemOperand(addr_reg));
134 break;
135
136 case MemoryAccess::Size::HalfWord:
137 __ mov(value_reg, Operand(access.value));
138 __ strh(value_reg, MemOperand(addr_reg));
139 break;
140
141 case MemoryAccess::Size::Word:
142 __ mov(value_reg, Operand(access.value));
143 __ str(value_reg, MemOperand(addr_reg));
144 break;
145 }
146 break;
147
148 case MemoryAccess::Kind::StoreExcl:
149 switch (access.size) {
150 case MemoryAccess::Size::Byte:
151 __ mov(value_reg, Operand(access.value));
152 __ strexb(dest_reg, value_reg, addr_reg);
153 break;
154
155 case MemoryAccess::Size::HalfWord:
156 __ mov(value_reg, Operand(access.value));
157 __ strexh(dest_reg, value_reg, addr_reg);
158 break;
159
160 case MemoryAccess::Size::Word:
161 __ mov(value_reg, Operand(access.value));
162 __ strex(dest_reg, value_reg, addr_reg);
163 break;
164 }
165 break;
166 }
167 }
168
169 static void AssembleLoadExcl(Assembler* assembler, MemoryAccess access,
170 Register value_reg, Register addr_reg) {
171 DCHECK(access.kind == MemoryAccess::Kind::LoadExcl);
172 AssembleMemoryAccess(assembler, access, no_reg, value_reg, addr_reg);
173 }
174
175 static void AssembleStoreExcl(Assembler* assembler, MemoryAccess access,
176 Register dest_reg, Register value_reg,
177 Register addr_reg) {
178 DCHECK(access.kind == MemoryAccess::Kind::StoreExcl);
179 AssembleMemoryAccess(assembler, access, dest_reg, value_reg, addr_reg);
180 }
181
182 static void TestInvalidateExclusiveAccess(
183 TestData initial_data, MemoryAccess access1, MemoryAccess access2,
184 MemoryAccess access3, int expected_res, TestData expected_data) {
185 Isolate* isolate = CcTest::i_isolate();
186 HandleScope scope(isolate);
187
188 Assembler assm(isolate, NULL, 0);
189
190 AssembleLoadExcl(&assm, access1, r1, r1);
191 AssembleMemoryAccess(&assm, access2, r3, r2, r1);
192 AssembleStoreExcl(&assm, access3, r0, r3, r1);
193
194 __ mov(pc, Operand(lr));
195
196 CodeDesc desc;
197 assm.GetCode(&desc);
198 Handle<Code> code = isolate->factory()->NewCode(
199 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
200 F3 f = FUNCTION_CAST<F3>(code->entry());
201 TestData t = initial_data;
202
203 int res =
204 reinterpret_cast<int>(CALL_GENERATED_CODE(isolate, f, &t, 0, 0, 0, 0));
205 CHECK_EQ(expected_res, res);
206 switch (access3.size) {
207 case MemoryAccess::Size::Byte:
208 CHECK_EQ(expected_data.b, t.b);
209 break;
210
211 case MemoryAccess::Size::HalfWord:
212 CHECK_EQ(expected_data.h, t.h);
213 break;
214
215 case MemoryAccess::Size::Word:
216 CHECK_EQ(expected_data.w, t.w);
217 break;
218 }
219 }
220
221 TEST(simulator_invalidate_exclusive_access) {
222 using Kind = MemoryAccess::Kind;
223 using Size = MemoryAccess::Size;
224
225 MemoryAccess ldrex_w(Kind::LoadExcl, Size::Word, offsetof(TestData, w));
226 MemoryAccess strex_w(Kind::StoreExcl, Size::Word, offsetof(TestData, w), 7);
227
228 // Address mismatch.
229 TestInvalidateExclusiveAccess(
230 TestData(1), ldrex_w,
231 MemoryAccess(Kind::LoadExcl, Size::Word, offsetof(TestData, dummy)),
232 strex_w, 1, TestData(1));
233
234 // Size mismatch.
235 TestInvalidateExclusiveAccess(
236 TestData(1), ldrex_w, MemoryAccess(),
237 MemoryAccess(Kind::StoreExcl, Size::HalfWord, offsetof(TestData, w), 7),
238 1, TestData(1));
239
240 // Load between ldrex/strex.
241 TestInvalidateExclusiveAccess(
242 TestData(1), ldrex_w,
243 MemoryAccess(Kind::Load, Size::Word, offsetof(TestData, dummy)), strex_w,
244 1, TestData(1));
245
246 // Store between ldrex/strex.
247 TestInvalidateExclusiveAccess(
248 TestData(1), ldrex_w,
249 MemoryAccess(Kind::Store, Size::Word, offsetof(TestData, dummy)), strex_w,
250 1, TestData(1));
251
252 // Match
253 TestInvalidateExclusiveAccess(TestData(1), ldrex_w, MemoryAccess(), strex_w,
254 0, TestData(7));
255 }
256
257 static int ExecuteMemoryAccess(Isolate* isolate, TestData* test_data,
258 MemoryAccess access) {
259 HandleScope scope(isolate);
260 Assembler assm(isolate, NULL, 0);
261 AssembleMemoryAccess(&assm, access, r0, r2, r1);
262 __ bx(lr);
263
264 CodeDesc desc;
265 assm.GetCode(&desc);
266 Handle<Code> code = isolate->factory()->NewCode(
267 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
268 F3 f = FUNCTION_CAST<F3>(code->entry());
269
270 return reinterpret_cast<int>(
271 CALL_GENERATED_CODE(isolate, f, test_data, 0, 0, 0, 0));
272 }
273
274 class MemoryAccessThread : public v8::base::Thread {
275 public:
276 MemoryAccessThread()
277 : Thread(Options("MemoryAccessThread")),
278 test_data_(NULL),
279 is_finished_(false),
280 has_request_(false),
281 did_request_(false) {}
282
283 virtual void Run() {
284 v8::Isolate::CreateParams create_params;
285 create_params.array_buffer_allocator = CcTest::array_buffer_allocator();
286 v8::Isolate* isolate = v8::Isolate::New(create_params);
287 Isolate* i_isolate = reinterpret_cast<Isolate*>(isolate);
288 v8::Isolate::Scope scope(isolate);
289
290 v8::base::LockGuard<v8::base::Mutex> lock_guard(&mutex_);
291 while (!is_finished_) {
292 while (!(has_request_ || is_finished_)) {
293 has_request_cv_.Wait(&mutex_);
294 }
295
296 if (is_finished_) {
297 break;
298 }
299
300 ExecuteMemoryAccess(i_isolate, test_data_, access_);
301 has_request_ = false;
302 did_request_ = true;
303 did_request_cv_.NotifyOne();
304 }
305 }
306
307 void NextAndWait(TestData* test_data, MemoryAccess access) {
308 DCHECK(!has_request_);
309 v8::base::LockGuard<v8::base::Mutex> lock_guard(&mutex_);
310 test_data_ = test_data;
311 access_ = access;
312 has_request_ = true;
313 has_request_cv_.NotifyOne();
314 while (!did_request_) {
315 did_request_cv_.Wait(&mutex_);
316 }
317 did_request_ = false;
318 }
319
320 void Finish() {
321 v8::base::LockGuard<v8::base::Mutex> lock_guard(&mutex_);
322 is_finished_ = true;
323 has_request_cv_.NotifyOne();
324 }
325
326 private:
327 TestData* test_data_;
328 MemoryAccess access_;
329 bool is_finished_;
330 bool has_request_;
331 bool did_request_;
332 v8::base::Mutex mutex_;
333 v8::base::ConditionVariable has_request_cv_;
334 v8::base::ConditionVariable did_request_cv_;
335 };
336
337 TEST(simulator_invalidate_exclusive_access_threaded) {
338 using Kind = MemoryAccess::Kind;
339 using Size = MemoryAccess::Size;
340
341 Isolate* isolate = CcTest::i_isolate();
342 HandleScope scope(isolate);
343
344 TestData test_data(1);
345
346 MemoryAccessThread thread;
347 thread.Start();
348
349 MemoryAccess ldrex_w(Kind::LoadExcl, Size::Word, offsetof(TestData, w));
350 MemoryAccess strex_w(Kind::StoreExcl, Size::Word, offsetof(TestData, w), 7);
351
352 // Exclusive store completed by another thread first.
353 test_data = TestData(1);
354 thread.NextAndWait(&test_data, MemoryAccess(Kind::LoadExcl, Size::Word,
355 offsetof(TestData, w)));
356 ExecuteMemoryAccess(isolate, &test_data, ldrex_w);
357 thread.NextAndWait(&test_data, MemoryAccess(Kind::StoreExcl, Size::Word,
358 offsetof(TestData, w), 5));
359 CHECK_EQ(1, ExecuteMemoryAccess(isolate, &test_data, strex_w));
360 CHECK_EQ(5, test_data.w);
361
362 // Exclusive store completed by another thread; different address, but masked
363 // to same
364 test_data = TestData(1);
365 ExecuteMemoryAccess(isolate, &test_data, ldrex_w);
366 thread.NextAndWait(&test_data, MemoryAccess(Kind::LoadExcl, Size::Word,
367 offsetof(TestData, dummy)));
368 thread.NextAndWait(&test_data, MemoryAccess(Kind::StoreExcl, Size::Word,
369 offsetof(TestData, dummy), 5));
370 CHECK_EQ(1, ExecuteMemoryAccess(isolate, &test_data, strex_w));
371 CHECK_EQ(1, test_data.w);
372
373 // Test failure when store between ldrex/strex.
374 test_data = TestData(1);
375 ExecuteMemoryAccess(isolate, &test_data, ldrex_w);
376 thread.NextAndWait(&test_data, MemoryAccess(Kind::Store, Size::Word,
377 offsetof(TestData, dummy)));
378 CHECK_EQ(1, ExecuteMemoryAccess(isolate, &test_data, strex_w));
379 CHECK_EQ(1, test_data.w);
380
381 thread.Finish();
382 thread.Join();
383 }
384
385 #undef __
386
387 #endif // USE_SIMULATOR
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