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Side by Side Diff: src/IceInstMIPS32.h

Issue 2005823002: [Subzero][MIPS32] Add LowerStore implementation (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments, enabled store test for MIPS32 Created 4 years, 6 months ago
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1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== //
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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145 Slt, 145 Slt,
146 Slti, 146 Slti,
147 Sltiu, 147 Sltiu,
148 Sltu, 148 Sltu,
149 Sra, 149 Sra,
150 Srav, 150 Srav,
151 Srl, 151 Srl,
152 Srlv, 152 Srlv,
153 Sub, 153 Sub,
154 Subu, 154 Subu,
155 Sw,
155 Xor, 156 Xor,
156 Xori 157 Xori
157 }; 158 };
158 159
159 static const char *getWidthString(Type Ty); 160 static const char *getWidthString(Type Ty);
160 161
161 void dump(const Cfg *Func) const override; 162 void dump(const Cfg *Func) const override;
162 163
163 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const { 164 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const {
164 Str << Opcode << "." << Ty; 165 Str << Opcode << "." << Ty;
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300 InstMIPS32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, 301 InstMIPS32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0,
301 Variable *Src1) 302 Variable *Src1)
302 : InstMIPS32(Func, K, 2, Dest) { 303 : InstMIPS32(Func, K, 2, Dest) {
303 addSource(Src0); 304 addSource(Src0);
304 addSource(Src1); 305 addSource(Src1);
305 } 306 }
306 307
307 static const char *Opcode; 308 static const char *Opcode;
308 }; 309 };
309 310
311 // InstMIPS32Memory represents instructions which loads/stores data on memory
312 // Its format is "OPCODE GPR, OFFSET(BASE GPR)"
313 template <InstMIPS32::InstKindMIPS32 K>
314 class InstMIPS32Memory : public InstMIPS32 {
315 InstMIPS32Memory() = delete;
316 InstMIPS32Memory(const InstMIPS32Memory &) = delete;
317 InstMIPS32Memory &operator=(const InstMIPS32Memory &) = delete;
318
319 public:
320 static InstMIPS32Memory *create(Cfg *Func, Variable *Value,
321 OperandMIPS32Mem *Mem) {
322 return new (Func->allocate<InstMIPS32Memory>())
323 InstMIPS32Memory(Func, Value, Mem);
324 }
325
326 void emit(const Cfg *Func) const override {
327 if (!BuildDefs::dump())
328 return;
329 Ostream &Str = Func->getContext()->getStrEmit();
330 assert(getSrcSize() == 2);
331 Str << "\t" << Opcode << "\t";
332 getSrc(0)->emit(Func);
333 Str << ", ";
334 getSrc(1)->emit(Func);
335 }
336
337 void emitIAS(const Cfg *Func) const override {
338 (void)Func;
339 llvm_unreachable("Not yet implemented");
340 }
341
342 void dump(const Cfg *Func) const override {
343 if (!BuildDefs::dump())
344 return;
345 Ostream &Str = Func->getContext()->getStrDump();
346 Str << "\t" << Opcode << "\t";
347 Str << " ";
348 getSrc(1)->dump(Func);
349 Str << ", ";
350 getSrc(0)->dump(Func);
351 }
352 static bool classof(const Inst *Inst) { return isClassof(Inst, K); }
353
354 private:
355 InstMIPS32Memory(Cfg *Func, Variable *Value, OperandMIPS32Mem *Mem)
356 : InstMIPS32(Func, K, 2, nullptr) {
357 addSource(Value);
358 addSource(Mem);
359 }
360 static const char *Opcode;
361 };
362
310 // InstMIPS32Label represents an intra-block label that is the target of an 363 // InstMIPS32Label represents an intra-block label that is the target of an
311 // intra-block branch. The offset between the label and the branch must be fit 364 // intra-block branch. The offset between the label and the branch must be fit
312 // in the instruction immediate (considered "near"). 365 // in the instruction immediate (considered "near").
313 class InstMIPS32Label : public InstMIPS32 { 366 class InstMIPS32Label : public InstMIPS32 {
314 InstMIPS32Label() = delete; 367 InstMIPS32Label() = delete;
315 InstMIPS32Label(const InstMIPS32Label &) = delete; 368 InstMIPS32Label(const InstMIPS32Label &) = delete;
316 InstMIPS32Label &operator=(const InstMIPS32Label &) = delete; 369 InstMIPS32Label &operator=(const InstMIPS32Label &) = delete;
317 370
318 public: 371 public:
319 static InstMIPS32Label *create(Cfg *Func, TargetMIPS32 *Target) { 372 static InstMIPS32Label *create(Cfg *Func, TargetMIPS32 *Target) {
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490 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>; 543 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>;
491 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>; 544 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>;
492 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>; 545 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>;
493 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; 546 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>;
494 using InstMIPS32Sra = InstMIPS32Imm16<InstMIPS32::Sra>; 547 using InstMIPS32Sra = InstMIPS32Imm16<InstMIPS32::Sra>;
495 using InstMIPS32Srav = InstMIPS32ThreeAddrGPR<InstMIPS32::Srav>; 548 using InstMIPS32Srav = InstMIPS32ThreeAddrGPR<InstMIPS32::Srav>;
496 using InstMIPS32Srl = InstMIPS32Imm16<InstMIPS32::Srl>; 549 using InstMIPS32Srl = InstMIPS32Imm16<InstMIPS32::Srl>;
497 using InstMIPS32Srlv = InstMIPS32ThreeAddrGPR<InstMIPS32::Srlv>; 550 using InstMIPS32Srlv = InstMIPS32ThreeAddrGPR<InstMIPS32::Srlv>;
498 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; 551 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>;
499 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>; 552 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>;
553 using InstMIPS32Sw = InstMIPS32Memory<InstMIPS32::Sw>;
500 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; 554 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
501 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; 555 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>;
502 using InstMIPS32Xori = InstMIPS32Imm16<InstMIPS32::Xori>; 556 using InstMIPS32Xori = InstMIPS32Imm16<InstMIPS32::Xori>;
503 557
504 /// Handles (some of) vmov's various formats. 558 /// Handles (some of) vmov's various formats.
505 class InstMIPS32Mov final : public InstMIPS32 { 559 class InstMIPS32Mov final : public InstMIPS32 {
506 InstMIPS32Mov() = delete; 560 InstMIPS32Mov() = delete;
507 InstMIPS32Mov(const InstMIPS32Mov &) = delete; 561 InstMIPS32Mov(const InstMIPS32Mov &) = delete;
508 InstMIPS32Mov &operator=(const InstMIPS32Mov &) = delete; 562 InstMIPS32Mov &operator=(const InstMIPS32Mov &) = delete;
509 563
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548 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const; 602 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const;
549 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; 603 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
550 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; 604 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
551 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; 605 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
552 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; 606 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
553 607
554 } // end of namespace MIPS32 608 } // end of namespace MIPS32
555 } // end of namespace Ice 609 } // end of namespace Ice
556 610
557 #endif // SUBZERO_SRC_ICEINSTMIPS32_H 611 #endif // SUBZERO_SRC_ICEINSTMIPS32_H
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