[Subzero][MIPS32] Add LowerStore implementation

src/IceTargetLoweringMIPS32.h

 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 93 matching lines @@
   }
 
   // TODO(ascull): what is the best size of MIPS?
   SizeT getMinJumpTableSize() const override { return 3; }
   void emitJumpTable(const Cfg *Func,
                      const InstJumpTable *JumpTable) const override;
 
   void emitVariable(const Variable *Var) const override;
 
   void emit(const ConstantInteger32 *C) const final {
-    (void)C;
-    llvm::report_fatal_error("Not yet implemented");
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Ctx->getStrEmit();
+    Str << C->getValue();
   }
   void emit(const ConstantInteger64 *C) const final {
     (void)C;
     llvm::report_fatal_error("Not yet implemented");
   }
   void emit(const ConstantFloat *C) const final {
     (void)C;
     llvm::report_fatal_error("Not yet implemented");
   }
   void emit(const ConstantDouble *C) const final {
@@ skipping 143 matching lines @@
   }
 
   void _sub(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Sub>(Dest, Src0, Src1);
   }
 
   void _subu(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Subu>(Dest, Src0, Src1);
   }
 
+  void _sw(Variable *Value, OperandMIPS32Mem *Mem) {
+    Context.insert<InstMIPS32Sw>(Value, Mem);
+  }
+
   void _xor(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Xor>(Dest, Src0, Src1);
   }
 
   void _xori(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert<InstMIPS32Xori>(Dest, Src, Imm);
   }
 
   void lowerArguments() override;
 
@@ skipping 79 matching lines @@
   void genTargetHelperCallFor(Inst *Instr) override { (void)Instr; }
   void doAddressOptLoad() override;
   void doAddressOptStore() override;
   void randomlyInsertNop(float Probability,
                          RandomNumberGenerator &RNG) override;
   void
   makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation,
                                 const SmallBitVector &ExcludeRegisters,
                                 uint64_t Salt) const override;
 
+  OperandMIPS32Mem *formMemoryOperand(Operand *Ptr, Type Ty);
+
   bool UsesFramePointer = false;
   bool NeedsStackAlignment = false;
   static SmallBitVector TypeToRegisterSet[RCMIPS32_NUM];
   static SmallBitVector TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
   static SmallBitVector RegisterAliases[RegMIPS32::Reg_NUM];
   SmallBitVector RegsUsed;
   VarList PhysicalRegisters[IceType_NUM];
   static constexpr uint32_t CHAR_BITS = 8;
   static constexpr uint32_t INT32_BITS = 32;
 
@@ skipping 40 matching lines @@
   explicit TargetHeaderMIPS32(GlobalContext *Ctx);
 
 private:
   ~TargetHeaderMIPS32() = default;
 };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H