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Issue 199903002: Introduce Push and Pop macro instructions for x64 (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Rebased with bleeding_edge Created 6 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1762 emit(0x00); 1762 emit(0x00);
1763 emit(0x00); 1763 emit(0x00);
1764 emit(0x00); 1764 emit(0x00);
1765 emit(0x00); 1765 emit(0x00);
1766 n -= 8; 1766 n -= 8;
1767 } 1767 }
1768 } 1768 }
1769 } 1769 }
1770 1770
1771 1771
1772 void Assembler::pop(Register dst) { 1772 void Assembler::popq(Register dst) {
1773 EnsureSpace ensure_space(this); 1773 EnsureSpace ensure_space(this);
1774 emit_optional_rex_32(dst); 1774 emit_optional_rex_32(dst);
1775 emit(0x58 | dst.low_bits()); 1775 emit(0x58 | dst.low_bits());
1776 } 1776 }
1777 1777
1778 1778
1779 void Assembler::pop(const Operand& dst) { 1779 void Assembler::popq(const Operand& dst) {
1780 EnsureSpace ensure_space(this); 1780 EnsureSpace ensure_space(this);
1781 emit_optional_rex_32(dst); 1781 emit_optional_rex_32(dst);
1782 emit(0x8F); 1782 emit(0x8F);
1783 emit_operand(0, dst); 1783 emit_operand(0, dst);
1784 } 1784 }
1785 1785
1786 1786
1787 void Assembler::popfq() { 1787 void Assembler::popfq() {
1788 EnsureSpace ensure_space(this); 1788 EnsureSpace ensure_space(this);
1789 emit(0x9D); 1789 emit(0x9D);
1790 } 1790 }
1791 1791
1792 1792
1793 void Assembler::push(Register src) { 1793 void Assembler::pushq(Register src) {
1794 EnsureSpace ensure_space(this); 1794 EnsureSpace ensure_space(this);
1795 emit_optional_rex_32(src); 1795 emit_optional_rex_32(src);
1796 emit(0x50 | src.low_bits()); 1796 emit(0x50 | src.low_bits());
1797 } 1797 }
1798 1798
1799 1799
1800 void Assembler::push(const Operand& src) { 1800 void Assembler::pushq(const Operand& src) {
1801 EnsureSpace ensure_space(this); 1801 EnsureSpace ensure_space(this);
1802 emit_optional_rex_32(src); 1802 emit_optional_rex_32(src);
1803 emit(0xFF); 1803 emit(0xFF);
1804 emit_operand(6, src); 1804 emit_operand(6, src);
1805 } 1805 }
1806 1806
1807 1807
1808 void Assembler::push(Immediate value) { 1808 void Assembler::pushq(Immediate value) {
1809 EnsureSpace ensure_space(this); 1809 EnsureSpace ensure_space(this);
1810 if (is_int8(value.value_)) { 1810 if (is_int8(value.value_)) {
1811 emit(0x6A); 1811 emit(0x6A);
1812 emit(value.value_); // Emit low byte of value. 1812 emit(value.value_); // Emit low byte of value.
1813 } else { 1813 } else {
1814 emit(0x68); 1814 emit(0x68);
1815 emitl(value.value_); 1815 emitl(value.value_);
1816 } 1816 }
1817 } 1817 }
1818 1818
1819 1819
1820 void Assembler::push_imm32(int32_t imm32) { 1820 void Assembler::pushq_imm32(int32_t imm32) {
1821 EnsureSpace ensure_space(this); 1821 EnsureSpace ensure_space(this);
1822 emit(0x68); 1822 emit(0x68);
1823 emitl(imm32); 1823 emitl(imm32);
1824 } 1824 }
1825 1825
1826 1826
1827 void Assembler::pushfq() { 1827 void Assembler::pushfq() {
1828 EnsureSpace ensure_space(this); 1828 EnsureSpace ensure_space(this);
1829 emit(0x9C); 1829 emit(0x9C);
1830 } 1830 }
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3214 3214
3215 3215
3216 bool RelocInfo::IsInConstantPool() { 3216 bool RelocInfo::IsInConstantPool() {
3217 return false; 3217 return false;
3218 } 3218 }
3219 3219
3220 3220
3221 } } // namespace v8::internal 3221 } } // namespace v8::internal
3222 3222
3223 #endif // V8_TARGET_ARCH_X64 3223 #endif // V8_TARGET_ARCH_X64
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