Implements Float32x4 and Uint32x4 instructions for ARM.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/simulator.h"
 #include "vm/runtime_entry.h"
@@ skipping 1861 matching lines @@
 void Assembler::Ror(Register rd, Register rm, Register rs, Condition cond) {
   mov(rd, ShifterOperand(rm, ROR, rs), cond);
 }
 
 
 void Assembler::Rrx(Register rd, Register rm, Condition cond) {
   mov(rd, ShifterOperand(rm, ROR, 0), cond);
 }
 
 
+void Assembler::Vreciprocalqs(QRegister qd, QRegister qm) {
+  ASSERT(qm != QTMP);
+  ASSERT(qd != QTMP);
+
+  // Reciprocal estimate.
+  vrecpeqs(qd, qm);
+  // 2 Newton-Raphson steps.
+  vrecpsqs(QTMP, qm, qd);
+  vmulqs(qd, qd, QTMP);
+  vrecpsqs(QTMP, qm, qd);
+  vmulqs(qd, qd, QTMP);
+}
+
+
+void Assembler::VreciprocalSqrtqs(QRegister qd, QRegister qm) {
+  ASSERT(qm != QTMP);
+  ASSERT(qd != QTMP);
+
+  // Reciprocal square root estimate.
+  vrsqrteqs(qd, qm);
+  // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
+  // First step.
+  vmulqs(QTMP, qd, qd);  // QTMP <- xn^2
+  vrsqrtsqs(QTMP, qm, QTMP);  // QTMP <- (3 - Q1*QTMP) / 2.
+  vmulqs(qd, qd, QTMP);  // xn+1 <- xn * QTMP
+  // Second step.
+  vmulqs(QTMP, qd, qd);
+  vrsqrtsqs(QTMP, qm, QTMP);
+  vmulqs(qd, qd, QTMP);
+}
+
+
+void Assembler::Vsqrtqs(QRegister qd, QRegister qm, QRegister temp) {
+  ASSERT(temp != QTMP);
+  ASSERT(qm != QTMP);
+  ASSERT(qd != QTMP);
+
+  if (temp != kNoQRegister) {
+    vmovq(temp, qm);
+    qm = temp;
+  }
+
+  VreciprocalSqrtqs(qd, qm);
+  vmovq(qm, qd);
+  Vreciprocalqs(qd, qm);
+}
+
+
+void Assembler::Vdivqs(QRegister qd, QRegister qn, QRegister qm) {
+  ASSERT(qd != QTMP);
+  ASSERT(qn != QTMP);
+  ASSERT(qm != QTMP);
+
+  Vreciprocalqs(qd, qm);
+  vmulqs(qd, qn, qd);
+}
+
+
 void Assembler::Branch(const ExternalLabel* label, Condition cond) {
   LoadImmediate(IP, label->address(), cond);  // Address is never patched.
   bx(IP, cond);
 }
 
 
 void Assembler::BranchPatchable(const ExternalLabel* label) {
   // Use a fixed size code sequence, since a function prologue may be patched
   // with this branch sequence.
   // Contrarily to BranchLinkPatchable, BranchPatchable requires an instruction
@@ skipping 644 matching lines @@
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM